From 8bde7f776c77b343aca29b8c7b58464d915ac245 Mon Sep 17 00:00:00 2001 From: wdenk Date: Fri, 27 Jun 2003 21:31:46 +0000 Subject: * Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) --- board/mpl/mip405/mip405.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'board/mpl/mip405/mip405.h') diff --git a/board/mpl/mip405/mip405.h b/board/mpl/mip405/mip405.h index 101b173ca4..f1e37ff8d1 100644 --- a/board/mpl/mip405/mip405.h +++ b/board/mpl/mip405/mip405.h @@ -32,7 +32,6 @@ extern int mem_test(unsigned long start, unsigned long ramsize,int mode); void user_led0(unsigned char on); - #endif /* timings */ /* PLD (CS7) */ @@ -114,7 +113,6 @@ void user_led0(unsigned char on); #define UART1_CR ((PER_UART1_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13)) - /* Flash CS0 or CS 1 */ /* 0x7F8FFE80 slowest timing at all... */ #define FLASH_BME_B 1 /* Burst enable */ @@ -182,6 +180,3 @@ void user_led0(unsigned char on); #define MPS_CR_B ((FLASH_BASE0_PRELIM & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) /* CR register for non Boot */ #define MPS_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) - - - -- cgit v1.2.3