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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-04-21 17:27:43 +0200
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-05-09 12:41:45 +0200
commita4f9ebe8e2dbd5a028a13dfb4425d1663b1cee0b (patch)
treefc3cb7f89a951db1eb8351668b90d5ce690a91d1 /drivers/mmc/rockchip_dw_mmc.c
parent9cca93dcc7240a73d269349455b5d9abedb0abe0 (diff)
rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS
The clocking of the designware MMC controller in the upstream (i.e. Linux) RK3399 has changed/does not match what the current DTS in U-Boot uses: the first clock entry now is HCLK_SDMMC instead of SCLK_SDMMC. With the simple clock driver used for the RK3399, this needs a change in the selector understood by the various case statements in the driver to ensure that the driver still loads successfully. Cover-letter: With the update of the RK3399 DTS (to sync it with what the kernel uses), the support for the Designware driver in the RK3399 needs some minor adjustments to successfully attach: - the clock identifier that the simple clk driver for the RK3399 sees has changed (SCLK_SDMMC -> HCLK_SDMMC) - the 'clock-freq-min-max' property has been deprecated upstream For the submitted update of the DTS see: https://patchwork.ozlabs.org/patch/752192/ For the deprecation of the 'clock-freq-min-max' property, see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b END Series-cc: Simon Glass <sjg@chromium.org> Series-cc: Klaus Goger <klaus.goger@theobroma-systems.com> Series-cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'drivers/mmc/rockchip_dw_mmc.c')
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