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authorTom Rini <trini@konsulko.com>2019-07-27 09:35:05 -0400
committerTom Rini <trini@konsulko.com>2019-07-27 09:35:05 -0400
commitdf9a7a195bdf0722399199bf373afc8309ae3ad7 (patch)
tree5bf1e2e3388725131640aac7d120647820ca5b48 /board
parent222701e157176a66628e4f399f52ca3307b018c9 (diff)
parent4a6f5b4f56b8bc6f36736fc0a07c5c4f9069e69b (diff)
Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20190719 - CCF for i.MX6 - nandbcb command to write SPL into NAND - Switch to DM (i.MX28) - Boards: Toradex, engicam, DH - Fixes for i.MX8 - Fixes for i.MX7ULP Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
Diffstat (limited to 'board')
-rw-r--r--board/armadeus/opos6uldev/board.c21
-rw-r--r--board/dhelectronics/dh_imx6/dh_imx6.c147
-rw-r--r--board/dhelectronics/dh_imx6/dh_imx6_spl.c9
-rw-r--r--board/engicam/common/board.c2
-rw-r--r--board/freescale/imx8qm_mek/imx8qm_mek.c29
-rw-r--r--board/freescale/imx8qxp_mek/imx8qxp_mek.c29
-rw-r--r--board/freescale/mx6sxsabresd/imximage.cfg7
-rw-r--r--board/freescale/mx7ulp_evk/imximage.cfg17
-rw-r--r--board/freescale/mx7ulp_evk/plugin.S23
-rw-r--r--board/liebherr/display5/common.c2
-rw-r--r--board/liebherr/display5/display5.c9
-rw-r--r--board/logicpd/imx6/imx6logic.c12
-rw-r--r--board/technexion/pico-imx7d/pico-imx7d.c13
-rw-r--r--board/toradex/apalis-imx8/apalis-imx8.c30
-rw-r--r--board/toradex/colibri-imx8x/colibri-imx8x.c29
-rw-r--r--board/toradex/common/tdx-cfg-block.c66
16 files changed, 115 insertions, 330 deletions
diff --git a/board/armadeus/opos6uldev/board.c b/board/armadeus/opos6uldev/board.c
index aed334f8fb..cbf40d5c4a 100644
--- a/board/armadeus/opos6uldev/board.c
+++ b/board/armadeus/opos6uldev/board.c
@@ -70,27 +70,6 @@ int setup_lcd(void)
}
#endif
-#ifdef CONFIG_USB_EHCI_MX6
-#define USB_OTHERREGS_OFFSET 0x800
-#define UCTRL_PWR_POL (1 << 9)
-
-int board_ehci_hcd_init(int port)
-{
- u32 *usbnc_usb_ctrl;
-
- if (port > 1)
- return -EINVAL;
-
- usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
- port * 4);
-
- /* Set Power polarity */
- setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
-
- return 0;
-}
-#endif
-
int opos6ul_board_late_init(void)
{
#ifdef CONFIG_VIDEO_MXS
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c
index 1d41690c0c..40cc2a854e 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -18,7 +18,6 @@
#include <asm/io.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/mxc_i2c.h>
#include <asm/mach-imx/sata.h>
#include <ahci.h>
#include <dwc_ahsata.h>
@@ -26,7 +25,7 @@
#include <errno.h>
#include <fsl_esdhc_imx.h>
#include <fuse.h>
-#include <i2c.h>
+#include <i2c_eeprom.h>
#include <miiphy.h>
#include <mmc.h>
#include <net.h>
@@ -36,92 +35,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define I2C_PAD_CTRL \
- (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define EEPROM_I2C_ADDRESS 0x50
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-static struct i2c_pads_info dh6sdl_i2c_pad_info0 = {
- .scl = {
- .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
- .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
- .gp = IMX_GPIO_NR(3, 21)
- },
- .sda = {
- .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
- .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
- .gp = IMX_GPIO_NR(3, 28)
- }
-};
-
-static struct i2c_pads_info dh6sdl_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
- .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
- .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-static struct i2c_pads_info dh6sdl_i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
- .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
- .gp = IMX_GPIO_NR(1, 3)
- },
- .sda = {
- .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
- .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
- .gp = IMX_GPIO_NR(1, 6)
- }
-};
-
-static struct i2c_pads_info dh6dq_i2c_pad_info0 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
- .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
- .gp = IMX_GPIO_NR(3, 21)
- },
- .sda = {
- .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
- .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
- .gp = IMX_GPIO_NR(3, 28)
- }
-};
-
-static struct i2c_pads_info dh6dq_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
- .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
- .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-static struct i2c_pads_info dh6dq_i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
- .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
- .gp = IMX_GPIO_NR(1, 3)
- },
- .sda = {
- .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
- .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
- .gp = IMX_GPIO_NR(1, 6)
- }
-};
-
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -196,7 +109,6 @@ int board_eth_init(bd_t *bis)
#ifdef CONFIG_USB_EHCI_MX6
static void setup_usb(void)
{
- gpio_request(IMX_GPIO_NR(3, 31), "USB-VBUS");
/*
* Set daisy chain for otg_pin_id on MX6Q.
* For MX6DL, this bit is reserved.
@@ -211,26 +123,12 @@ int board_usb_phy_mode(int port)
else
return USB_INIT_DEVICE;
}
-
-int board_ehci_power(int port, int on)
-{
- switch (port) {
- case 0:
- break;
- case 1:
- gpio_direction_output(IMX_GPIO_NR(3, 31), !!on);
- break;
- default:
- printf("MXC USB port %d not yet supported\n", port);
- return -EINVAL;
- }
-
- return 0;
-}
#endif
static int setup_dhcom_mac_from_fuse(void)
{
+ struct udevice *dev;
+ ofnode eeprom;
unsigned char enetaddr[6];
int ret;
@@ -245,13 +143,19 @@ static int setup_dhcom_mac_from_fuse(void)
return 0;
}
- ret = i2c_set_bus_num(2);
+ eeprom = ofnode_path("/soc/aips-bus@2100000/i2c@21a8000/eeprom@50");
+ if (!ofnode_valid(eeprom)) {
+ printf("Invalid hardware path to EEPROM!\n");
+ return -ENODEV;
+ }
+
+ ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
if (ret) {
- printf("Error switching I2C bus!\n");
+ printf("Cannot find EEPROM!\n");
return ret;
}
- ret = i2c_read(EEPROM_I2C_ADDRESS, 0xfa, 0x1, enetaddr, 0x6);
+ ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
if (ret) {
printf("Error reading configuration EEPROM!\n");
return ret;
@@ -282,18 +186,6 @@ int board_init(void)
/* Enable eim_slow clocks */
setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
-#ifdef CONFIG_SYS_I2C_MXC
- if (is_mx6dq()) {
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info0);
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info1);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info2);
- } else {
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info0);
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info1);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info2);
- }
-#endif
-
setup_dhcom_mac_from_fuse();
return 0;
@@ -372,3 +264,18 @@ int checkboard(void)
puts("Board: DHCOM i.MX6\n");
return 0;
}
+
+#ifdef CONFIG_MULTI_DTB_FIT
+int board_fit_config_name_match(const char *name)
+{
+ if (is_mx6dq()) {
+ if (!strcmp(name, "imx6q-dhcom-pdk2"))
+ return 0;
+ } else if (is_mx6sdl()) {
+ if (!strcmp(name, "imx6dl-dhcom-pdk2"))
+ return 0;
+ }
+
+ return -1;
+}
+#endif
diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index b492961042..1b7acc8df7 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -440,8 +440,13 @@ static void setup_iomux_sd(void)
/* SPI */
static iomux_v3_cfg_t const ecspi1_pads[] = {
- /* SS0 */
- IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL)),
+ /* SS0 - SS of boot flash */
+ IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 |
+ MUX_PAD_CTRL(SPI_PAD_CTRL | PAD_CTL_PUS_100K_UP)),
+ /* SS2 - SS of DHCOM SPI1 */
+ IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 |
+ MUX_PAD_CTRL(SPI_PAD_CTRL | PAD_CTL_PUS_100K_UP)),
+
IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)),
IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)),
IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)),
diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c
index 7486f0ac2d..567b9f63e5 100644
--- a/board/engicam/common/board.c
+++ b/board/engicam/common/board.c
@@ -53,8 +53,6 @@ static void setenv_fdt_file(void)
env_set("fdt_file", "imx6dl-icore-rqs.dtb");
} else if (!strcmp(cmp_dtb, "imx6ul-geam"))
env_set("fdt_file", "imx6ul-geam.dtb");
- else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc"))
- env_set("fdt_file", "imx6ul-isiot-emmc.dtb");
else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc"))
env_set("fdt_file", "imx6ul-isiot-emmc.dtb");
else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand"))
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c
index e69efc4dd6..b7a609b097 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -34,21 +34,11 @@ static void setup_iomux_uart(void)
int board_early_init_f(void)
{
+ sc_pm_clock_rate_t rate = SC_80MHZ;
int ret;
- /* Set UART0 clock root to 80 MHz */
- sc_pm_clock_rate_t rate = 80000000;
-
- /* Power up UART0 */
- ret = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON);
- if (ret)
- return ret;
- ret = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, &rate);
- if (ret)
- return ret;
-
- /* Enable UART0 clock root */
- ret = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false);
+ /* Set UART0 clock root to 80 MHz */
+ ret = sc_pm_setup_uart(SC_R_UART_0, rate);
if (ret)
return ret;
@@ -88,19 +78,6 @@ int board_phy_config(struct phy_device *phydev)
}
#endif
-void build_info(void)
-{
- u32 sc_build = 0, sc_commit = 0;
-
- /* Get SCFW build and commit id */
- sc_misc_build_info(-1, &sc_build, &sc_commit);
- if (!sc_build) {
- printf("SCFW does not support build info\n");
- sc_commit = 0; /* Display 0 when the build info is not supported*/
- }
- printf("Build: SCFW %x\n", sc_commit);
-}
-
int checkboard(void)
{
puts("Board: iMX8QM MEK\n");
diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 120731422c..3cf73e1ab6 100644
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -40,21 +40,11 @@ static void setup_iomux_uart(void)
int board_early_init_f(void)
{
+ sc_pm_clock_rate_t rate = SC_80MHZ;
int ret;
- /* Set UART0 clock root to 80 MHz */
- sc_pm_clock_rate_t rate = 80000000;
-
- /* Power up UART0 */
- ret = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON);
- if (ret)
- return ret;
- ret = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, &rate);
- if (ret)
- return ret;
-
- /* Enable UART0 clock root */
- ret = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false);
+ /* Set UART0 clock root to 80 MHz */
+ ret = sc_pm_setup_uart(SC_R_UART_0, rate);
if (ret)
return ret;
@@ -104,19 +94,6 @@ int board_phy_config(struct phy_device *phydev)
}
#endif
-void build_info(void)
-{
- u32 sc_build = 0, sc_commit = 0;
-
- /* Get SCFW build and commit id */
- sc_misc_build_info(-1, &sc_build, &sc_commit);
- if (!sc_build) {
- printf("SCFW does not support build info\n");
- sc_commit = 0; /* Display 0 when the build info is not supported */
- }
- printf("Build: SCFW %x\n", sc_commit);
-}
-
int checkboard(void)
{
puts("Board: iMX8QXP MEK\n");
diff --git a/board/freescale/mx6sxsabresd/imximage.cfg b/board/freescale/mx6sxsabresd/imximage.cfg
index 3e94f6ab66..0354bb36e2 100644
--- a/board/freescale/mx6sxsabresd/imximage.cfg
+++ b/board/freescale/mx6sxsabresd/imximage.cfg
@@ -18,6 +18,13 @@ IMAGE_VERSION 2
BOOT_FROM sd
/*
+ * Secure boot support
+ */
+#ifdef CONFIG_SECURE_BOOT
+CSF CONFIG_CSF_SIZE
+#endif
+
+/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
diff --git a/board/freescale/mx7ulp_evk/imximage.cfg b/board/freescale/mx7ulp_evk/imximage.cfg
index a6e18d9440..43ebc23091 100644
--- a/board/freescale/mx7ulp_evk/imximage.cfg
+++ b/board/freescale/mx7ulp_evk/imximage.cfg
@@ -45,12 +45,12 @@ DATA 4 0x403f00dc 0x00000000
DATA 4 0x403e0040 0x01000020
DATA 4 0x403e0500 0x01000000
DATA 4 0x403e050c 0x80808080
-DATA 4 0x403e0508 0x00140000
-DATA 4 0x403E0510 0x00000004
-DATA 4 0x403E0514 0x00000002
+DATA 4 0x403e0508 0x00160002
+DATA 4 0x403E0510 0x00000001
+DATA 4 0x403E0514 0x00000014
DATA 4 0x403e0500 0x00000001
CHECK_BITS_SET 4 0x403e0500 0x01000000
-DATA 4 0x403e050c 0x8080801E
+DATA 4 0x403e050c 0x8080801B
CHECK_BITS_SET 4 0x403e050c 0x00000040
DATA 4 0x403E0030 0x00000001
DATA 4 0x403e0040 0x11000020
@@ -94,11 +94,6 @@ DATA 4 0x40AB0820 0x33333333
DATA 4 0x40AB0824 0x33333333
DATA 4 0x40AB0828 0x33333333
-DATA 4 0x40AB082C 0xf3333333
-DATA 4 0x40AB0830 0xf3333333
-DATA 4 0x40AB0834 0xf3333333
-DATA 4 0x40AB0838 0xf3333333
-
DATA 4 0x40AB08C0 0x24922492
DATA 4 0x40AB08B8 0x00000800
@@ -113,8 +108,8 @@ DATA 4 0x40AB0030 0x009F0E10
DATA 4 0x40AB0040 0x0000003F
DATA 4 0x40AB0000 0xC3190000
-DATA 4 0x40AB001C 0x00008050
-DATA 4 0x40AB001C 0x00008058
+DATA 4 0x40AB001C 0x00008010
+DATA 4 0x40AB001C 0x00008018
DATA 4 0x40AB001C 0x003F8030
DATA 4 0x40AB001C 0x003F8038
DATA 4 0x40AB001C 0xFF0A8030
diff --git a/board/freescale/mx7ulp_evk/plugin.S b/board/freescale/mx7ulp_evk/plugin.S
index 082b2beaa3..2cc93dbdd5 100644
--- a/board/freescale/mx7ulp_evk/plugin.S
+++ b/board/freescale/mx7ulp_evk/plugin.S
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
*/
#include <config.h>
@@ -15,13 +16,14 @@
str r3, [r2, #0x40]
ldr r3, =0x01000000
str r3, [r2, #0x500]
+
ldr r3, =0x80808080
str r3, [r2, #0x50c]
- ldr r3, =0x00140000
+ ldr r3, =0x00160002
str r3, [r2, #0x508]
- ldr r3, =0x00000004
+ ldr r3, =0x00000001
str r3, [r2, #0x510]
- ldr r3, =0x00000002
+ ldr r3, =0x00000014
str r3, [r2, #0x514]
ldr r3, =0x00000001
str r3, [r2, #0x500]
@@ -33,7 +35,7 @@ wait1:
cmp r4, r3
bne wait1
- ldr r3, =0x8080801E
+ ldr r3, =0x8080801B
str r3, [r2, #0x50c]
ldr r3, =0x00000040
@@ -132,15 +134,6 @@ wait2:
ldr r1, =0x33333333
str r1, [r0, #0x828]
- ldr r1, =0xf3333333
- str r1, [r0, #0x82c]
- ldr r1, =0xf3333333
- str r1, [r0, #0x830]
- ldr r1, =0xf3333333
- str r1, [r0, #0x834]
- ldr r1, =0xf3333333
- str r1, [r0, #0x838]
-
ldr r1, =0x24922492
str r1, [r0, #0x8c0]
ldr r1, =0x00000800
@@ -168,9 +161,9 @@ wait2:
ldr r1, =0xC3190000
str r1, [r0, #0x0]
- ldr r1, =0x00008050
+ ldr r1, =0x00008010
str r1, [r0, #0x1c]
- ldr r1, =0x00008058
+ ldr r1, =0x00008018
str r1, [r0, #0x1c]
ldr r1, =0x003F8030
str r1, [r0, #0x1c]
diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c
index 7b89d16970..8390d9a0f3 100644
--- a/board/liebherr/display5/common.c
+++ b/board/liebherr/display5/common.c
@@ -68,7 +68,7 @@ iomux_v3_cfg_t const ecspi2_pads[] = {
int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
{
- if (bus != 1 || cs != (IMX_GPIO_NR(5, 29) << 8))
+ if (bus != 1 || cs != 0)
return -EINVAL;
return IMX_GPIO_NR(5, 29);
diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c
index 6b7ff0acb6..ea49b7197f 100644
--- a/board/liebherr/display5/display5.c
+++ b/board/liebherr/display5/display5.c
@@ -413,12 +413,3 @@ int misc_init_r(void)
return 0;
}
-
-static struct mxc_serial_platdata mxc_serial_plat = {
- .reg = (struct mxc_uart *)UART5_BASE,
-};
-
-U_BOOT_DEVICE(mxc_serial) = {
- .name = "serial_mxc",
- .platdata = &mxc_serial_plat,
-};
diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c
index e48b3beb16..6e3ffa72d7 100644
--- a/board/logicpd/imx6/imx6logic.c
+++ b/board/logicpd/imx6/imx6logic.c
@@ -223,25 +223,15 @@ int board_mmc_init(bd_t *bis)
switch (reg) {
case 0:
SETUP_IOMUX_PADS(usdhc1_pads);
- usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
break;
case 1:
SETUP_IOMUX_PADS(usdhc2_pads);
- usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[1].sdhc_clk;
break;
}
- return fsl_esdhc_initialize(bis, &usdhc_cfg[reg]);
+ return 0;
}
-int board_mmc_getcd(struct mmc *mmc)
-{
- return 1;
-}
#endif
static void ccgr_init(void)
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index e3d75e549a..216475c8de 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -16,7 +16,6 @@
#include <i2c.h>
#include <miiphy.h>
#include <netdev.h>
-#include <usb.h>
#include <power/pmic.h>
#include <power/pfuze3000_pmic.h>
#include "../../freescale/common/pfuze.h"
@@ -328,15 +327,3 @@ int board_ehci_hcd_init(int port)
return 0;
}
-int board_usb_phy_mode(int port)
-{
- switch (port) {
- case 0:
- return USB_INIT_DEVICE;
- case 1:
- return USB_INIT_HOST;
- default:
- return -EINVAL;
- }
- return 0;
-}
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index f516e546a8..5433c7581b 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -37,22 +37,11 @@ static void setup_iomux_uart(void)
int board_early_init_f(void)
{
- sc_pm_clock_rate_t rate;
+ sc_pm_clock_rate_t rate = SC_80MHZ;
sc_err_t err = 0;
- /* Power up UART1 */
- err = sc_pm_set_resource_power_mode(-1, SC_R_UART_1, SC_PM_PW_MODE_ON);
- if (err != SC_ERR_NONE)
- return 0;
-
- /* Set UART3 clock root to 80 MHz */
- rate = 80000000;
- err = sc_pm_set_clock_rate(-1, SC_R_UART_1, SC_PM_CLK_PER, &rate);
- if (err != SC_ERR_NONE)
- return 0;
-
- /* Enable UART1 clock root */
- err = sc_pm_clock_enable(-1, SC_R_UART_1, SC_PM_CLK_PER, true, false);
+ /* Set UART1 clock root to 80 MHz and enable it */
+ err = sc_pm_setup_uart(SC_R_UART_1, rate);
if (err != SC_ERR_NONE)
return 0;
@@ -82,19 +71,6 @@ int board_phy_config(struct phy_device *phydev)
}
#endif
-void build_info(void)
-{
- u32 sc_build = 0, sc_commit = 0;
-
- /* Get SCFW build and commit id */
- sc_misc_build_info(-1, &sc_build, &sc_commit);
- if (!sc_build) {
- printf("SCFW does not support build info\n");
- sc_commit = 0; /* Display 0 if build info not supported */
- }
- printf("Build: SCFW %x\n", sc_commit);
-}
-
int checkboard(void)
{
puts("Model: Toradex Apalis iMX8\n");
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index aa8eaa0ea1..8c725b7593 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -51,19 +51,9 @@ int board_early_init_f(void)
if (err != SC_ERR_NONE)
return 0;
- /* Power up UART3 */
- err = sc_pm_set_resource_power_mode(-1, SC_R_UART_3, SC_PM_PW_MODE_ON);
- if (err != SC_ERR_NONE)
- return 0;
-
- /* Set UART3 clock root to 80 MHz */
- rate = 80000000;
- err = sc_pm_set_clock_rate(-1, SC_R_UART_3, SC_PM_CLK_PER, &rate);
- if (err != SC_ERR_NONE)
- return 0;
-
- /* Enable UART3 clock root */
- err = sc_pm_clock_enable(-1, SC_R_UART_3, SC_PM_CLK_PER, true, false);
+ /* Set UART3 clock root to 80 MHz and enable it */
+ rate = SC_80MHZ;
+ err = sc_pm_setup_uart(SC_R_UART_3, rate);
if (err != SC_ERR_NONE)
return 0;
@@ -93,19 +83,6 @@ int board_phy_config(struct phy_device *phydev)
}
#endif
-void build_info(void)
-{
- u32 sc_build = 0, sc_commit = 0;
-
- /* Get SCFW build and commit id */
- sc_misc_build_info(-1, &sc_build, &sc_commit);
- if (!sc_build) {
- printf("SCFW does not support build info\n");
- sc_commit = 0; /* Display 0 if build info not supported */
- }
- printf("Build: SCFW %x\n", sc_commit);
-}
-
int checkboard(void)
{
puts("Model: Toradex Colibri iMX8X\n");
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index f69c4433b2..c19d7611c2 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -7,8 +7,9 @@
#include "tdx-cfg-block.h"
#if defined(CONFIG_TARGET_APALIS_IMX6) || \
+ defined(CONFIG_TARGET_APALIS_IMX8) || \
defined(CONFIG_TARGET_COLIBRI_IMX6) || \
- defined(CONFIG_TARGET_COLIBRI_IMX8QXP)
+ defined(CONFIG_TARGET_COLIBRI_IMX8X)
#include <asm/arch/sys_proto.h>
#else
#define is_cpu_type(cpu) (0)
@@ -129,6 +130,10 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
ret = -ENODEV;
goto out;
}
+ if (mmc_init(mmc)) {
+ puts("MMC init failed\n");
+ return -EINVAL;
+ }
if (part != mmc_get_blk_desc(mmc)->hwpart) {
if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) {
puts("MMC partition switch failed\n");
@@ -287,6 +292,7 @@ static int get_cfgblock_interactive(void)
char message[CONFIG_SYS_CBSIZE];
char *soc;
char it = 'n';
+ char wb = 'n';
int len;
/* Unknown module by default */
@@ -296,10 +302,17 @@ static int get_cfgblock_interactive(void)
sprintf(message, "Is the module the 312 MHz version? [y/N] ");
else
sprintf(message, "Is the module an IT version? [y/N] ");
-
len = cli_readline(message);
it = console_buffer[0];
+#if defined(CONFIG_TARGET_APALIS_IMX8) || \
+ defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \
+ defined(CONFIG_TARGET_COLIBRI_IMX8X)
+ sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] ");
+ len = cli_readline(message);
+ wb = console_buffer[0];
+#endif
+
soc = env_get("soc");
if (!strcmp("mx6", soc)) {
#ifdef CONFIG_TARGET_APALIS_IMX6
@@ -327,12 +340,6 @@ static int get_cfgblock_interactive(void)
tdx_hw_tag.prodid = COLIBRI_IMX6S;
}
#elif CONFIG_TARGET_COLIBRI_IMX6ULL
- char wb = 'n';
-
- sprintf(message, "Does the module have Wi-Fi / Bluetooth? " \
- "[y/N] ");
- len = cli_readline(message);
- wb = console_buffer[0];
if (it == 'y' || it == 'Y') {
if (wb == 'y' || wb == 'Y')
tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT;
@@ -349,9 +356,31 @@ static int get_cfgblock_interactive(void)
tdx_hw_tag.prodid = COLIBRI_IMX7D;
else if (!strcmp("imx7s", soc))
tdx_hw_tag.prodid = COLIBRI_IMX7S;
- else if (is_cpu_type(MXC_CPU_IMX8QXP))
- tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT;
- else if (!strcmp("tegra20", soc)) {
+ else if (is_cpu_type(MXC_CPU_IMX8QM)) {
+ if (it == 'y' || it == 'Y') {
+ if (wb == 'y' || wb == 'Y')
+ tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT;
+ else
+ tdx_hw_tag.prodid = APALIS_IMX8QM_IT;
+ } else {
+ if (wb == 'y' || wb == 'Y')
+ tdx_hw_tag.prodid = APALIS_IMX8QP_WIFI_BT;
+ else
+ tdx_hw_tag.prodid = APALIS_IMX8QP;
+ }
+ } else if (is_cpu_type(MXC_CPU_IMX8QXP)) {
+ if (it == 'y' || it == 'Y') {
+ if (wb == 'y' || wb == 'Y')
+ tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT;
+ else
+ tdx_hw_tag.prodid = COLIBRI_IMX8QXP_IT;
+ } else {
+ if (wb == 'y' || wb == 'Y')
+ tdx_hw_tag.prodid = COLIBRI_IMX8DX_WIFI_BT;
+ else
+ tdx_hw_tag.prodid = COLIBRI_IMX8DX;
+ }
+ } else if (!strcmp("tegra20", soc)) {
if (it == 'y' || it == 'Y')
if (gd->ram_size == 0x10000000)
tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT;
@@ -482,8 +511,7 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
* On NAND devices, recreation is only allowed if the page is
* empty (config block invalid...)
*/
- printf("NAND erase block %d need to be erased before creating" \
- " a Toradex config block\n",
+ printf("NAND erase block %d need to be erased before creating a Toradex config block\n",
CONFIG_TDX_CFG_BLOCK_OFFSET /
get_nand_dev_by_index(0)->erasesize);
goto out;
@@ -492,8 +520,7 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
* On NOR devices, recreation is only allowed if the sector is
* empty and write protection is off (config block invalid...)
*/
- printf("NOR sector at offset 0x%02x need to be erased and " \
- "unprotected before creating a Toradex config block\n",
+ printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n",
CONFIG_TDX_CFG_BLOCK_OFFSET);
goto out;
#else
@@ -604,9 +631,8 @@ static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc,
return CMD_RET_USAGE;
}
-U_BOOT_CMD(
- cfgblock, 4, 0, do_cfgblock,
- "Toradex config block handling commands",
- "create [-y] [barcode] - (Re-)create Toradex config block\n"
- "cfgblock reload - Reload Toradex config block from flash"
+U_BOOT_CMD(cfgblock, 4, 0, do_cfgblock,
+ "Toradex config block handling commands",
+ "create [-y] [barcode] - (Re-)create Toradex config block\n"
+ "cfgblock reload - Reload Toradex config block from flash"
);