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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-09-19 15:01:23 +0200
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-10-02 11:20:55 +0200
commitcbddcc7fc309c251e2cf6677324ff0c772007159 (patch)
treee10ebbcc6ba602866d0090de6d1779e3162b47c5 /arch/arm/mach-rockchip/bootrom.c
parent260321c8dd2d9096a51178a2d312681bab2ff41a (diff)
arm: provide a PCS-compliant setjmp implementation
The previous setjmp-implementation (as a static inline function that contained an 'asm volatile' sequence) was extremely fragile: (some versions of) GCC optimised the set of registers. One critical example was the removal of 'r9' from the clobber list, if -ffixed-reg9 was supplied. To increase robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> Series-changes: 3 - converted setjmp/longjmp from inline-assembly to separate .S files to improve predicatability if emitted code
Diffstat (limited to 'arch/arm/mach-rockchip/bootrom.c')
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