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author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-10-03 14:20:51 +0200 |
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committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-11-01 23:20:54 +0100 |
commit | 733853d59ac31f600dbab232191c18a8133bfcb2 (patch) | |
tree | 035a19e7a6d9219a51ed634a6ce517746593ffe2 | |
parent | 4fb8f7dcc262a5d212e37d9f75f6eaeb8b46c02f (diff) |
rockchip: rk3036: use aligned address for SPL_TEXT_BASE
With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r-- | include/configs/rk3036_common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 9ac0df57de..a387099e8c 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10081fff -#define CONFIG_SPL_TEXT_BASE 0x10081004 +#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" |