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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-08-30 15:25:58 +0200
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-11-01 23:20:52 +0100
commit2fb48626226e1dee3eae0a644c61934640c2fffb (patch)
tree3a376de8b20aa56c8fa32f719af26b5bd241bc6c
parent7b03e164b06055e6041628f19704175acc4cae4a (diff)
spl: atf: introduce spl_invoke_atf and make bl31_entry private
This adds a new interface spl_invoke_atf() that takes a spl_image_info argument and then derives the necessary parameters for the ATF entry. Based on the additional information recorded (into /fit-images) from the FIT loadables, we can now easily locate the next boot stage. We now pass a pointer to a FDT as the platform-specific parameter pointer to ATF (so we don't run into the future headache of every board/platform defining their own proprietary tag-structure), as FDT access is already available in ATF. With the necessary infrastructure in place, we can now update the support for the ARM Trusted Firmware to dispatch into the spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is loaded. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r--common/spl/spl.c12
-rw-r--r--common/spl/spl_atf.c84
2 files changed, 83 insertions, 13 deletions
diff --git a/common/spl/spl.c b/common/spl/spl.c
index aaddddd995..3f3497f8dd 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -418,6 +418,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
case IH_OS_U_BOOT:
debug("Jumping to U-Boot\n");
break;
+#if CONFIG_IS_ENABLED(ATF)
+ case IH_OS_ARM_TRUSTED_FIRMWARE:
+ debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+ spl_invoke_atf(&spl_image);
+ break;
+#endif
#ifdef CONFIG_SPL_OS_BOOT
case IH_OS_LINUX:
debug("Jumping to Linux\n");
@@ -432,6 +438,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024);
#endif
+
#ifdef CONFIG_BOOTSTAGE_STASH
int ret;
@@ -442,11 +449,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
debug("Failed to stash bootstage: err=%d\n", ret);
#endif
- if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
- debug("loaded - jumping to U-Boot via ATF BL31.\n");
- bl31_entry();
- }
-
debug("loaded - jumping to U-Boot...\n");
spl_board_prepare_for_boot();
jump_to_image_no_args(&spl_image);
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 6e8f928044..63557c01e8 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -5,6 +5,7 @@
* reserved.
* Copyright (C) 2016 Rockchip Electronic Co.,Ltd
* Written by Kever Yang <kever.yang@rock-chips.com>
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -30,7 +31,7 @@ static struct bl31_params *bl2_to_bl31_params;
*
* @return bl31 params structure pointer
*/
-struct bl31_params *bl2_plat_get_bl31_params(void)
+static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
{
struct entry_point_info *bl33_ep_info;
@@ -66,7 +67,7 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
/* BL33 expects to receive the primary CPU MPID (through x0) */
bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
- bl33_ep_info->pc = CONFIG_SYS_TEXT_BASE;
+ bl33_ep_info->pc = bl33_entry;
bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
DISABLE_ALL_EXECPTIONS);
@@ -77,21 +78,88 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
return bl2_to_bl31_params;
}
-void raw_write_daif(unsigned int daif)
+static inline void raw_write_daif(unsigned int daif)
{
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
}
-void bl31_entry(void)
+typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
+
+static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
+ uintptr_t fdt_addr)
{
struct bl31_params *bl31_params;
- void (*entry)(struct bl31_params *params, void *plat_params) = NULL;
+ atf_entry_t atf_entry = (atf_entry_t)bl31_entry;
- bl31_params = bl2_plat_get_bl31_params();
- entry = (void *)CONFIG_SPL_ATF_TEXT_BASE;
+ bl31_params = bl2_plat_get_bl31_params(bl33_entry);
raw_write_daif(SPSR_EXCEPTION_MASK);
dcache_disable();
- entry(bl31_params, NULL);
+ atf_entry((void *)bl31_params, (void *)fdt_addr);
+}
+
+static int spl_fit_images_find_uboot(void *blob)
+{
+ int parent, node, ndepth;
+ const void *data;
+
+ if (!blob)
+ return -FDT_ERR_BADMAGIC;
+
+ parent = fdt_path_offset(blob, "/fit-images");
+ if (parent < 0)
+ return -FDT_ERR_NOTFOUND;
+
+ for (node = fdt_next_node(blob, parent, &ndepth);
+ (node >= 0) && (ndepth > 0);
+ node = fdt_next_node(blob, node, &ndepth)) {
+ if (ndepth != 1)
+ continue;
+
+ data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
+ if (!data)
+ continue;
+
+ if (genimg_get_os_id(data) == IH_OS_U_BOOT)
+ return node;
+ };
+
+ return -FDT_ERR_NOTFOUND;
+}
+
+uintptr_t spl_fit_images_get_entry(void *blob, int node)
+{
+ ulong val;
+
+ val = fdt_getprop_u32(blob, node, "entry-point");
+ if (val == FDT_ERROR)
+ val = fdt_getprop_u32(blob, node, "load-addr");
+
+ debug("%s: entry point 0x%lx\n", __func__, val);
+ return val;
+}
+
+void spl_invoke_atf(struct spl_image_info *spl_image)
+{
+ uintptr_t bl33_entry = CONFIG_SYS_TEXT_BASE;
+ void *blob = spl_image->fdt_addr;
+ int node;
+
+ /*
+ * Find the U-Boot binary (in /fit-images) load addreess or
+ * entry point (if different) and pass it as the BL3-3 entry
+ * point.
+ * This will need to be extended to support Falcon mode.
+ */
+
+ node = spl_fit_images_find_uboot(blob);
+ if (node >= 0)
+ bl33_entry = spl_fit_images_get_entry(blob, node);
+
+ /*
+ * We don't provide a BL3-2 entry yet, but this will be possible
+ * using similar logic.
+ */
+ bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob);
}