diff options
| author | Klaus Goger <klaus.goger@theobroma-systems.com> | 2019-06-12 07:15:32 +0200 |
|---|---|---|
| committer | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-10-13 18:16:40 +0200 |
| commit | 1f2644a5d0bb7770317e11addf8c4227d346c3a7 (patch) | |
| tree | e8d6a4b5b21b597a28020c6140e94618aa9fa7a6 | |
| parent | f223078f54f572f46813070162af02ac33d417bb (diff) | |
rockchip: rk3386: Add option to print on UART4.
The RK3368 TPL does not use a pinctrl driver to setup the UART pins.
Instead it works based on config macros, which set the base address
of the actual UART block.
Currently the RK3368 TPL supports UART0 and UART2.
This patch adds UART4 in the same way as UART0.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
| -rw-r--r-- | arch/arm/mach-rockchip/rk3368-board-tpl.c | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c index f90a1fdca7..603e304ae7 100644 --- a/arch/arm/mach-rockchip/rk3368-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c @@ -86,8 +86,6 @@ void board_debug_uart_init(void) * initialised. For this reason, we can not access * the GRF address range using the syscon API. */ - struct rk3368_grf * const grf = - (struct rk3368_grf * const)0xff770000; enum { GPIO2D1_MASK = GENMASK(3, 2), @@ -97,15 +95,39 @@ void board_debug_uart_init(void) GPIO2D0_MASK = GENMASK(1, 0), GPIO2D0_GPIO = 0, GPIO2D0_UART0_SIN = (1 << 0), + + GPIO0D2_MASK = GENMASK(7, 6), + GPIO0D2_GPIO = 0, + GPIO0D2_UART4_SIN = (3 << 6), + + GPIO0D3_MASK = GENMASK(5, 4), + GPIO0D3_GPIO = 0, + GPIO0D3_UART4_SOUT = (3 << 4), + }; #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) + struct rk3368_grf * const grf = + (struct rk3368_grf * const)0xff770000; + /* Enable early UART0 on the RK3368 */ rk_clrsetreg(&grf->gpio2d_iomux, GPIO2D0_MASK, GPIO2D0_UART0_SIN); rk_clrsetreg(&grf->gpio2d_iomux, GPIO2D1_MASK, GPIO2D1_UART0_SOUT); #endif + +#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff1c0000) + struct rk3368_pmu_grf * const pmu_grf = + (struct rk3368_pmu_grf * const)0xff738000; + + /* Enable early UART4 on the RK3368 */ + rk_clrsetreg(&pmu_grf->gpio0d_iomux, + GPIO0D2_MASK, GPIO0D2_UART4_SIN); + rk_clrsetreg(&pmu_grf->gpio0d_iomux, + GPIO0D3_MASK, GPIO0D3_UART4_SOUT); +#endif + } void board_init_f(ulong dummy) |