diff options
| author | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-10-14 18:22:00 +0200 |
|---|---|---|
| committer | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-10-14 18:22:00 +0200 |
| commit | 1c71b33bd17d7357591cfb63869ef79d26944637 (patch) | |
| tree | 87110eecdd84bd50b4b6a3281e413b9a36621e07 | |
| parent | 1f2644a5d0bb7770317e11addf8c4227d346c3a7 (diff) | |
rk3399: dram: Fix slave delay for DDR3.
The RK3399 DRAM driver sets up a slave delay of 0x380.
The comment above suggests, that this value is only valid
in case of LPDDR3. This patch addresses this by setting
a value of 0x300.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3399.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index b150e94b79..f9ff444b10 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -2540,7 +2540,7 @@ static int pctl_cfg(struct udevice *dev, writel(0x103f0000, &denali_phy[542 + i * 128]); // /* Delay lines */ // TODO: 0x380 on LPDDR3, 0x300 on DDR3 - const u32 slave_delay = 0x380; + const u32 slave_delay = 0x300; clrsetbits_le32(&denali_phy[544 + i * 128], 0x7ff << 8, slave_delay << 8); clrsetbits_le32(&denali_phy[545 + i * 128], |