diff options
author | David Wu <david.wu@rock-chips.com> | 2019-04-10 10:01:18 +0800 |
---|---|---|
committer | Jianhong Chen <chenjh@rock-chips.com> | 2019-04-10 14:14:15 +0800 |
commit | 860893596c908bffb1957f9c87cb8b7ce8ac090d (patch) | |
tree | 5c22129971016f2a1e65cce6bbf2fac4f57781d2 | |
parent | 4dad63273a8aa0989a94715320d2195b47a74d50 (diff) |
ARM: dts: rk1808-evb: Add gmac support at dts level
Note that the gmac status is disabled.
Change-Id: Ifac56c5d5c1cc10d5f2882fbfd1ef02d97299127
Signed-off-by: David Wu <david.wu@rock-chips.com>
-rw-r--r-- | arch/arm/dts/rk1808-evb.dts | 23 | ||||
-rw-r--r-- | arch/arm/dts/rk1808.dtsi | 26 |
2 files changed, 36 insertions, 13 deletions
diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts index 728ca1c73b..d857a0b5f2 100644 --- a/arch/arm/dts/rk1808-evb.dts +++ b/arch/arm/dts/rk1808-evb.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "rk1808.dtsi" #include "rk1808-u-boot.dtsi" +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <linux/media-bus-format.h> @@ -30,6 +31,13 @@ press-threshold-microvolt = <10000>; }; }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; }; &emmc { @@ -44,6 +52,21 @@ status = "okay"; }; +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + assigned-clocks = <&cru SCLK_GMAC>; + assigned-clock-parents = <&gmac_clkin>; + tx_delay = <0x50>; + rx_delay = <0x3a>; + status = "disabled"; +}; + &uart2 { clock-frequency = <24000000>; status = "okay"; diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi index 13ff2b5516..47e1975660 100644 --- a/arch/arm/dts/rk1808.dtsi +++ b/arch/arm/dts/rk1808.dtsi @@ -1302,11 +1302,11 @@ rgmii_pins: rgmii-pins { rockchip,pins = /* rgmii_txen */ - <2 RK_PA1 2 &pcfg_pull_none_12ma>, + <2 RK_PA1 2 &pcfg_pull_none_4ma>, /* rgmii_txd1 */ - <2 RK_PA2 2 &pcfg_pull_none_12ma>, + <2 RK_PA2 2 &pcfg_pull_none_4ma>, /* rgmii_txd0 */ - <2 RK_PA3 2 &pcfg_pull_none_12ma>, + <2 RK_PA3 2 &pcfg_pull_none_4ma>, /* rgmii_rxd0 */ <2 RK_PA4 2 &pcfg_pull_none>, /* rgmii_rxd1 */ @@ -1314,13 +1314,13 @@ /* rgmii_rxdv */ <2 RK_PA7 2 &pcfg_pull_none>, /* rgmii_mdio */ - <2 RK_PB0 2 &pcfg_pull_none>, + <2 RK_PB0 2 &pcfg_pull_none_2ma>, /* rgmii_mdc */ - <2 RK_PB2 2 &pcfg_pull_none>, + <2 RK_PB2 2 &pcfg_pull_none_2ma>, /* rgmii_txd3 */ - <2 RK_PB3 2 &pcfg_pull_none_12ma>, + <2 RK_PB3 2 &pcfg_pull_none_4ma>, /* rgmii_txd2 */ - <2 RK_PB4 2 &pcfg_pull_none_12ma>, + <2 RK_PB4 2 &pcfg_pull_none_4ma>, /* rgmii_rxd2 */ <2 RK_PB5 2 &pcfg_pull_none>, /* rgmii_rxd3 */ @@ -1328,7 +1328,7 @@ /* rgmii_clk */ <2 RK_PB7 2 &pcfg_pull_none>, /* rgmii_txclk */ - <2 RK_PC1 2 &pcfg_pull_none_12ma>, + <2 RK_PC1 2 &pcfg_pull_none_4ma>, /* rgmii_rxclk */ <2 RK_PC2 2 &pcfg_pull_none>; }; @@ -1336,11 +1336,11 @@ rmii_pins: rmii-pins { rockchip,pins = /* rmii_txen */ - <2 RK_PA1 2 &pcfg_pull_none_12ma>, + <2 RK_PA1 2 &pcfg_pull_none_4ma>, /* rmii_txd1 */ - <2 RK_PA2 2 &pcfg_pull_none_12ma>, + <2 RK_PA2 2 &pcfg_pull_none_4ma>, /* rmii_txd0 */ - <2 RK_PA3 2 &pcfg_pull_none_12ma>, + <2 RK_PA3 2 &pcfg_pull_none_4ma>, /* rmii_rxd0 */ <2 RK_PA4 2 &pcfg_pull_none>, /* rmii_rxd1 */ @@ -1350,9 +1350,9 @@ /* rmii_rxdv */ <2 RK_PA7 2 &pcfg_pull_none>, /* rmii_mdio */ - <2 RK_PB0 2 &pcfg_pull_none>, + <2 RK_PB0 2 &pcfg_pull_none_2ma>, /* rmii_mdc */ - <2 RK_PB2 2 &pcfg_pull_none>, + <2 RK_PB2 2 &pcfg_pull_none_2ma>, /* rmii_clk */ <2 RK_PB7 2 &pcfg_pull_none>; }; |