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authorChristoph Muellner <christoph.muellner@theobroma-systems.com>2019-04-25 19:19:30 +0200
committerChristoph Muellner <christoph.muellner@theobroma-systems.com>2019-05-06 14:32:33 +0200
commit99888fb038cfe9358b465eed98f9c4eaf9877eec (patch)
tree75cbab6660ff7682e6b8e4263a2018122fd435ff
parentc2663a78ccda1dd87b5be8480fedcce4e04f4472 (diff)
rockchip: clk: rk3399: allow requests for all UART clocks
This patch adds the rate for UART1 and UART3 the same way as already implemented for UART0 and UART2. This is required for boards, which have their console output on these UARTs. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
-rw-r--r--drivers/clk/rockchip/clk_rk3399.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index cab2bd9943..8648b66ea5 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -912,7 +912,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
rate = rk3399_spi_get_clk(priv->cru, clk->id);
break;
case SCLK_UART0:
+ case SCLK_UART1:
case SCLK_UART2:
+ case SCLK_UART3:
return 24000000;
break;
case PCLK_HDMI_CTRL: