diff options
| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-05-17 13:51:35 +0200 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-05-17 13:51:35 +0200 |
| commit | 5632dc61f1ada74d06d79634ea0ad105590b04bb (patch) | |
| tree | 0e84afdd263f43013be8ef57948c493bc09c06c1 | |
| parent | b7473a533821a1174004e2c10e6807f45d63f7fe (diff) | |
[WIP]: increase PHY_DRV_ODT_* to 48 for DDR3 (for 933MHz) for CA onlypuma-v2017.05-DDR3-1866
| -rw-r--r-- | arch/arm/mach-rockchip/rk3399/sdram_rk3399.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c index 894083d5b8..e40bb5cf9a 100644 --- a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c @@ -230,12 +230,12 @@ static void set_ds_odt(const struct chan_info *chan, tsel_idle_select_n = PHY_DRV_ODT_Hi_Z; } else { tsel_rd_select_p = PHY_DRV_ODT_240; - tsel_wr_select_p = PHY_DRV_ODT_48; + tsel_wr_select_p = PHY_DRV_ODT_34_3; ca_tsel_wr_select_p = PHY_DRV_ODT_48; tsel_idle_select_p = PHY_DRV_ODT_240; tsel_rd_select_n = PHY_DRV_ODT_240; - tsel_wr_select_n = PHY_DRV_ODT_48; + tsel_wr_select_n = PHY_DRV_ODT_34_3; ca_tsel_wr_select_n = PHY_DRV_ODT_48; tsel_idle_select_n = PHY_DRV_ODT_240; } |