diff options
| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2019-05-19 16:54:24 +0200 |
|---|---|---|
| committer | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2019-06-06 13:56:39 +0200 |
| commit | 41ff2f5a57ba4d5efb50e197d490438056fea046 (patch) | |
| tree | c38da1cfde9a6cccb9639f4cd8c304392a997b94 | |
| parent | 6022d3b5d2690ab0488451a70d85f6c7dd1bf060 (diff) | |
rockchip: board: lion-rk3368: update DTS for Lion-v2.0
This update the DTS for Lion-v2.0 (i.e. Vitesse GbE PHY instead of the
Micrel PHY used in v1.x), enables PMIC connectivity via I2C0 and
updates the SDMMC node from the Linux DTS.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Müllner <christoph.muellner@theobroma-systems.com>
| -rw-r--r-- | arch/arm/dts/rk3368-lion.dts | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dts index 5e578b175b..1f4d351e08 100644 --- a/arch/arm/dts/rk3368-lion.dts +++ b/arch/arm/dts/rk3368-lion.dts @@ -59,6 +59,16 @@ }; &sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <25000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + rockchip,default-sample-phase = <90>; + vmmc-supply = <&vcc33_io>; status = "okay"; }; @@ -76,6 +86,12 @@ pinctrl-0 = <&rgmii_pins>; tx_delay = <0x10>; rx_delay = <0x10>; + + /* + * Lion-v2.x uses a VSC8531 GbE PHY. To enable the reference + * clock at 125MHz, we need some additional configuration. + */ + vitesse,enable-clkout = <125000000>; }; &i2c0 { @@ -100,6 +116,7 @@ vcc12-supply = <&vcc_sys>; clock-output-names = "xin32k", "rk808-clkout2"; #clock-cells = <1>; + status = "okay"; regulators { vdd_cpu: DCDC_REG1 { |