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/*
 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/memory/rk3399-dram.h>

/ {
	ddr_timing: ddr_timing {
		compatible = "rockchip,ddr-timing";
		ddr3_speed_bin = <21>;
		pd_idle = <0>;
		sr_idle = <0>;
		sr_mc_gate_idle = <0>;
		srpd_lite_idle	= <0>;
		standby_idle = <0>;
		auto_lp_dis_freq = <666>;
		ddr3_dll_dis_freq = <300>;
		phy_dll_dis_freq = <260>;

		ddr3_odt_dis_freq = <666>;
		ddr3_drv = <DDR3_DS_40ohm>;
		ddr3_odt = <DDR3_ODT_120ohm>;
		phy_ddr3_ca_drv = <PHY_DRV_ODT_40>;
		phy_ddr3_dq_drv = <PHY_DRV_ODT_40>;
		phy_ddr3_odt = <PHY_DRV_ODT_240>;

		lpddr3_odt_dis_freq = <666>;
		lpddr3_drv = <LP3_DS_34ohm>;
		lpddr3_odt = <LP3_ODT_240ohm>;
		phy_lpddr3_ca_drv = <PHY_DRV_ODT_34_3>;
		phy_lpddr3_dq_drv = <PHY_DRV_ODT_34_3>;
		phy_lpddr3_odt = <PHY_DRV_ODT_240>;

		lpddr4_odt_dis_freq = <800>;
		lpddr4_drv = <LP4_PDDS_240ohm>;
		lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
		lpddr4_ca_odt = <LP4_CA_ODT_DIS>;
		phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>;
		phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_40>;
		phy_lpddr4_dq_drv = <PHY_DRV_ODT_60>;
		phy_lpddr4_odt = <PHY_DRV_ODT_40>;
	};
};