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/*
* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
#include "rk3308.dtsi"
/ {
model = "Rockchip RK3308 FPGA Platform";
compatible = "rockchip,rk3308-fpga", "rockchip,rk3308";
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff0b0000 console=ttyFIQ0 init=/init initrd=0x9000000,0x18bfc0";
};
memory@200000 {
device_type = "memory";
reg = <0x0 0x00200000 0x0 0x0FE00000>;
};
};
&fiq_debugger {
rockchip,serial-id = <1>;
rockchip,irq-mode-enable = <1>;
status = "ok";
};
&cpu1 {
/delete-property/enable-method;
};
&cpu2 {
/delete-property/enable-method;
};
&cpu3 {
/delete-property/enable-method;
};
&emmc {
cap-mmc-highspeed;
mmc-hs200-1_8v;
supports-emmc;
non-removable;
num-slots = <1>;
status = "okay";
};
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