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tag namev4.14-rockchip-clk1 (b81606312283ec1c9bf6bc95cab684ce34ea7e62)
tag date2017-08-13 18:27:31 +0200
tagged byHeiko Stuebner <heiko@sntech.de>
tagged objectcommit 5d890c2df9...
The biggest change is fixing the jitter on the fractional clock-type
Rockchip socs experience with the default approximation. For that we introduce the ability to override it with a clock-specific approximation and use that to create the needed rate settings as described in the Rockchip soc manuals (same for all Rockchip socs). Apart from that we have support for the rk3126 clock controller which is similar to the rk3128 with some minimal differences and a lot of improvements and fixes for the rv1108 clock controller (missing clocks, some clock-ids, naming fixes, register fixes). -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmQg40QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgVRMCACE/9mEEErHNMx4mhlX8FcDJxwdW4fU8Hbd YtoLWQPGa8K5Bs+CfT9t1cDZPOKzX/JD6qBr9XMwMJvFBC/zZoB9lYdf9S+/zpwN FMUtbkoLUYAwPMm/2+V4wI8FbnSdopB7SgdBJJuPLXRbWYglrCsloS3HYjvEVUma /sxXIQNL7oiI4AIbJgg+rD3SKeVgIwMvDZBxNvJNsN712Jc9ipvFlGjnfEfIs0ag GB4z9HgPzu4rP3kRgsJMkXv9lRT2QkPUdUdjQAHxMFvZ1+bbpftKqWF6+J0i0Fdg 0LN1aVHVxt58FrWwDmUyMn5r6eIkOh+RH7IdSH6oyv7R59c7z8+j =pQ23 -----END PGP SIGNATURE-----