Rockchip specific extensions to the Synopsys Designware HDMI ================================ Required properties: - compatible: "rockchip,rk3228-dw-hdmi", "rockchip,rk3288-dw-hdmi", "rockchip,rk3328-dw-hdmi", "rockchip,rk3366-dw-hdmi", "rockchip,rk3368-dw-hdmi", "rockchip,rk3399-dw-hdmi"; - reg: Physical base address and length of the controller's registers. - clocks: phandle to hdmi iahb and isfr clocks. - clock-names: should be "iahb" "isfr" - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - interrupts: HDMI interrupt number - ports: contain a port node with endpoint definitions as defined in Documentation/devicetree/bindings/media/video-interfaces.txt. For vopb,set the reg = <0> and set the reg = <1> for vopl. - reg-io-width: the width of the reg:1,4, the value should be 4 on rk3288 platform Optional properties - ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing - clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec", phandle to the VPLL clock, name should be "vpll", phandle to the GRF clock, name should be "grf". phandle to the HDMI-PHY dclk, name should be "dclk". - rockchip,phy-table: the parameter table of hdmi phy configuration. - phys: phandle to third party HDMI PHY node - phy-names: the string "hdmi_phy" when is found in a node, along with "phys" attribute, provides phandle to HDMI PHY node Example: hdmi: hdmi@ff980000 { compatible = "rockchip,rk3288-dw-hdmi"; reg = <0xff980000 0x20000>; reg-io-width = <4>; ddc-i2c-bus = <&i2c5>; rockchip,grf = <&grf>; interrupts = ; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; clock-names = "iahb", "isfr"; status = "disabled"; ports { hdmi_in: port { #address-cells = <1>; #size-cells = <0>; hdmi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_hdmi>; }; hdmi_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_hdmi>; }; }; }; rockchip,phy-table = <74250000 0x8009 0x0004 0x0272>, <165000000 0x802b 0x0004 0x0209>, <297000000 0x8039 0x0005 0x028d>, <594000000 0x8039 0x0000 0x019d>, <000000000 0x0000 0x0000 0x0000>; };