From 543172cfe30641ea9ab396b78e3331f9ba321342 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Wed, 20 Jun 2018 10:09:34 +0800 Subject: clk: rockchip: Add support to get boost configure from devicetree There are some configuration options for cpu boost, such as low frequency, higt frequency, boost backup pll, and so on. Change-Id: I35d65f05bbd5ef2a70e4a2e4637e7b4f9f67dda9 Signed-off-by: Finley Xiao --- drivers/clk/rockchip/clk.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'drivers/clk/rockchip/clk.c') diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index b187fae83991..b90f21731d5e 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -410,8 +410,6 @@ struct rockchip_clk_provider * __init rockchip_clk_init(struct device_node *np, spin_lock_init(&ctx->lock); ctx->grf = syscon_regmap_lookup_by_phandle(ctx->cru_node, "rockchip,grf"); - ctx->boost = syscon_regmap_lookup_by_phandle(ctx->cru_node, - "rockchip,boost"); return ctx; @@ -455,8 +453,7 @@ void __init rockchip_clk_register_plls(struct rockchip_clk_provider *ctx, list->con_offset, grf_lock_offset, list->lock_shift, list->mode_offset, list->mode_shift, list->rate_table, - list->flags, list->pll_flags, - list->boost_enabled); + list->flags, list->pll_flags); if (IS_ERR(clk)) { pr_err("%s: failed to register clock %s\n", __func__, list->name); -- cgit v1.2.3