From fd7a5ac9b59e74544181598fba54fd843b878db4 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 25 Sep 2013 14:24:01 -0700 Subject: drm/i915/vlv: fix up broken precision in vlv_crtc_clock_get MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit commit 662c6ecbcdca1fe8a5402f6c83d98d242917a043 upstream. With some divider values we end up with the wrong result. So remove the intermediates (like Ville suggested in the first place) to get the right answer. Signed-off-by: Chris Wilson Signed-off-by: Jesse Barnes Signed-off-by: Daniel Vetter Signed-off-by: Ville Syrjälä Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/intel_display.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8abe7970f2b7..f535670b42d1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5040,7 +5040,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc, int pipe = pipe_config->cpu_transcoder; intel_clock_t clock; u32 mdiv; - int refclk = 100000, fastclk, update_rate; + int refclk = 100000; mutex_lock(&dev_priv->dpio_lock); mdiv = vlv_dpio_read(dev_priv, DPIO_DIV(pipe)); @@ -5052,10 +5052,8 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc, clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7; clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f; - update_rate = refclk / clock.n; - clock.vco = update_rate * clock.m1 * clock.m2; - fastclk = clock.vco / clock.p1 / clock.p2; - clock.dot = (2 * fastclk); + clock.vco = refclk * clock.m1 * clock.m2 / clock.n; + clock.dot = 2 * clock.vco / (clock.p1 * clock.p2); pipe_config->adjusted_mode.clock = clock.dot / 10; } -- cgit v1.2.3