From 26bbb2af075a4c60905c1a8e22e8717f0438658f Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Mon, 11 Mar 2019 16:39:28 +0800 Subject: ARM: dts: rockchip: rk312x-android: set vop-dclk-mode default value to 1 Fix display abnormal caused by DDR frequency conversion. Change-Id: Iaa3bf6177d42f8ac5f9078b58a138f48d5c1d874 Signed-off-by: Wyon Bi --- arch/arm/boot/dts/rk312x-android.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rk312x-android.dtsi b/arch/arm/boot/dts/rk312x-android.dtsi index ad76eceaadef..c35c3a05dffc 100644 --- a/arch/arm/boot/dts/rk312x-android.dtsi +++ b/arch/arm/boot/dts/rk312x-android.dtsi @@ -109,6 +109,7 @@ }; &dmc { + vop-dclk-mode = <1>; status = "okay"; }; -- cgit v1.2.3