Age | Commit message (Collapse) | Author |
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Based on the TSADC Tshut mode to select pinctrl,
instead of setting pinctrl based on architecture
(Not depends on pinctrl setting by "init" or "default").
And it requires setting the tshut polarity before select pinctrl.
Change-Id: Iac9ca05073b0181ee13b0048d0c2a54204f82bca
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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As clock frequency should be between 500KHz and 800KHz, inter_pd_soc
should be no less than 90us and bandgap chopper function should be
enabled, add a new initialize function to handle the power sequence
for rk1808 SoCs.
Change-Id: Ia1ad81783ccc34bc4218dbbd62f7710ee0773b0a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
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Change-Id: I2d0f379fb08eaf4a4819bc36bcb61e5ca4a50d45
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
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RV1108 SOC has one Temperature Sensor for CPU.
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from commit 4eca8cac256a9557f9e1295147df8135c0b3540f)
Change-Id: I23c67c5fde2ec243efa84961c001fcad4468cb7b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
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Change-Id: Icc0bb8a076a3fbd5f8ab70db8d7e032165528ae8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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init temp_last with a more suitable value. also we eliminate
the steady state error by ajusting the temp calc fomular.
extra useful log is added to mark tsadc is probed successfully.
Change-Id: If88031c10646437fa7b5152c70aeaebf93e4df05
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Tsadc has a tshut pin which is designed to reset the pmic or soc,
when the temperature inside soc is too high. we should switch off
the tshut function and change the pin to gpio function in reboot
process, eg, software reset. If not, the tsadc module will WRONGLY
pull high the tshut pin during its reset process and then WRONGLY
reset the pmic or soc, which incurred a hardware reset. The hardware
reset will reset everything inside soc, even includes the power on
reason flag, which is set by software before reboot process.
we also change over-temperature protection mode to cru mode,
since the tshut pin have be changed to gpio function.
Change-Id: Iac3dacf55a4b5536fccd2eb05a6a9e6923a082c0
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Change-Id: Ibf1782ca471c8ad4b14d6fd64eeb123181903adc
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Change-Id: Ifed5628c18cece0658754095e718da39ac703413
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Change-Id: I46ac8ebd4a92367acb610fb96c18a487c67602d4
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Due to 32k clock jitter, tsadc will wrongly report a very
high temperature, that is a temperature-jump. This may lead
to an abnormal OS reboot. A filter function is added to
predict the true temperature.
Change-Id: I5b5641efe8e64b4058a604f274350b1e94584fa6
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Change-Id: I31f87741a874657fb7caf494ebafd53b6c0ef3b1
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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It is no necessary to print warning agian and again if we don't
add rockchip,grf for dt, otherwise I saw the following log when
doing suspend-2-resume. We only need to print it once when parsing
dt. It looks quite trivial but the log is apparently verbose.
[ 26.615415] PM: early resume of devices complete after 1.539 msecs
[ 26.622002] rk_tsadcv2_initialize: Missing rockchip,grf property
[ 26.629359] rk_gmac-dwmac ff290000.ethernet: init for RGMII
[ 26.639794] PM: resume of devices complete after 18.109 msecs
[ 26.646925] Restarting tasks ... done.
Change-Id: Ia3124f557e2b4f47c691671d27ea6a0f136f3f6f
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal.git next
commit 947d62b53ff381d1ca4b3288b53a26c6d38957aa)
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Change-Id: I8cf3bbaea76d379dcfd1c89482254854df62cfea
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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Due to the voltage ripple, the sensing data of the tsadc is not accurate.
And in this patch, the bandgap feature is enhanced to remove the voltage
ripple, and then the tsadc can sense the temperature more precisely.
Obsolete codes are removed as well.
Change-Id: Ifdd98def63212bc13306e7d5befee5eb32dbbc2f
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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The hardware-tracked trips will set the alarm interrupt value for
registers. Then when the thermal zone has no trips to be set,
That make the thermal trips callback a over range value.
The root cause is the rk_tsadcv2_temp_to_code() function to handle the
invalid temperature range is indeed incorrect, let's fix it on now.
Otherwise, the thermal alarm interrupt will be triggered all the time
on some SoCs.
Fox example:
localhost tmp # grep thermal /proc/interrupts; sleep 5;
grep thermal /proc/interrupts
23: 994830 .. GICv3 129 Level rockchip_thermal
23: 1003423 .. GICv3 129 Level rockchip_thermal
Change-Id: I0ddbd0b2dd9c03e785e588f5f339f1eeed4e1c5c
Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
(am from https://patchwork.kernel.org/patch/9192357/)
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In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.
Change-Id: Ie8038a1ae5837ad4aa31b04d1f3ace299f82e396
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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we should increase the period cycles to save power since the rk3399 has
the high frequency for tsadc clock.
Change-Id: Ia9481515cac6dd6026d3312ac930329a3e906436
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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Whenever the current temperature is updated, the trip points immediately
below and above the current temperature are found. A sensor driver
callback `set_trips' is then called with the temperatures.
Lastly, The sensor will trigger the hardware high temperature interrupts
to increase the sampleing rate and throttle frequency to limit the temperature
rising When performing passive cooling.
Change-Id: I16b2ab4f8fb85425aab5cd3777ca600bd4cace20
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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This reverts commit ec24f1ae50a370c9ef7b7166156b79b4d4feee5f.
Change-Id: I1fa579309691ac20d22bebf9f9cea1cd2243440f
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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Disable thermal->clk when enabling pclk fails in
resume routine.
Change-Id: I7d8780be04891bf4cddf1ba970eae2a2f14ec7ac
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(am from https://patchwork.kernel.org/patch/8867151/)
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Whenever the current temperature is updated, the trip points immediately
below and above the current temperature are found. A sensor driver
callback `set_trips' is then called with the temperatures.
Lastly, The sensor will trigger the hardware high temperature interrupts
to increase the sampleing rate and throttle frequency to limit the temperature
rising When performing passive cooling.
Change-Id: I43d37a8431240cb7b62da7bff83464aba3c8983e
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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To update the notes for keeping in mind that quickly in case
someone re-read this driver in the future.
Change-Id: Ic752ed1d6a818f21560befd981383e8b532dff36
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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The interleave is between power down and start of conversion,
This patch adds to workaround ic time sync issue for control.
Change-Id: Ib9f28fd92bcecf8ddaa8a69d47ced87fef04e7c6
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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The RK3366 SoCs have two Temperature Sensors, channel 0 is for CPU
channel 1 is for GPU.
Change-Id: I71324c65e82804f52d464b986e1d86127f8dc040
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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We should judge the table.id[mid].code insearch algorithm on matter the
adc value increment or decrement.
Or otherwise, the temperature return the incorrect value in some cases.
[ 1.438589] adc_val=402,temp=-40000
[ 1.438903] adc_val=403,temp=-39375
[ 1.439217] adc_val=404,temp=-38750
...
[ 1.441102] adc_val=410,temp=-40000
[ 1.441416] adc_val=411,temp=-34445
[ 1.441737] adc_val=412,temp=-33889
...
Let's fix it right now.
Fixes commit 020ba95
"thermal: rockchip: Add the sort mode for adc value increment or decrement"
Change-Id: Icac84d06ebf463439ca11db5a19d629b4b2b865c
Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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devm_thermal_zone_of_sensor_register
This changes the driver to use the devm_ version
of thermal_zone_of_sensor_register and cleans
up the local points and unregister calls.
Change-Id: I9c13e9c91a626a0ef8df69edf3f383c494536bab
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
commit 93c2f85df90edfc515f99cacd7720e286861f744)
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This adds the grf property to handle the tsadc power sequence on
rk3399 SoCs.
The rk3399 tsadc can work with this patch on now.
while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp;sleep .5; done
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41666
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
Change-Id: I0155826bddf0017ea4985920268b333a20278bbe
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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This patch fixes the incorrect conversion table.
The Code to Temperature mapping is updated based on sillcon results.
Change-Id: If8ae3f5fb59786a8db8bf79276ecea44ab92ffc9
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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As the TRM says, add the tsadc_q_sel to control the temperature-code
sequence since the rk3228/rk3399 need set this bit (1024 - tsadc_q)
as output.
Fixes: commit
b0d7033 "thermal: rockchip: Support the RK3399 SoCs in thermal driver"
7b02a5e "thermal: rockchip: Support the RK3228 SoCs in thermal driver"
Reported-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal fixes
commit 7ea38c6c3622bc65279dc6a1fecd28227027fbb5)
Change-Id: I9d39b947e197393688ed58bf079e519e7d5a6d9e
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This patch renames to be more adapter compatibles since more and more
SoCs are supported in thermal driver.
Reported-by: Huang,Tao <huangtao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal fixes
commit 952418a34f26f252cd0afbca8c33a8506a03cab7)
Change-Id: Ia053d6877a16b36e357bd9b427b323703e5a514b
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As the Dan report the smatch check the thermal driver warning:
drivers/thermal/rockchip_thermal.c:551 rockchip_configure_from_dt()
warn: impossible condition '(thermal->tshut_temp > ((~0 >> 1))) =>
(s32min-s32max > s32max)'
Although The shut_temp read from DT is u32,the temperature is currently
represented as int not long in the thermal driver.
Let's change to make shut_temp instead of the thermal->tshut_temp for
the condition.
Fixes: commit 437df2172e8d
("thermal: rockchip: consistently use int for temperatures")
Change-Id: I7951bf83baec2ef0ae8fe50d5735f992a7d3ed41
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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The RK3399 SoCs have two Temperature Sensors, channel 0 is for CPU.
channel 1 is for GPU.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
commit b0d70338bca22cb14367042a9d5cead116e7f2d9)
Change-Id: I12bccb3c4a56c56f16a019c3faad909bfae65b97
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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The RK3228 SoCs has one Temperature Sensor, channel 0 is for CPU.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
commit 7b02a5e782fa151a610c455ac06e5a998e9cb3f3)
Change-Id: I45def60892a8f5cd6fd18ad064b4bf7c13260b59
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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the calculation use a global table, not their own table.
so adapt the table to the correct one.
Change-Id: Id416e41910de297259a85a3ae06f4cc3c5788035
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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This patchset trys to dictate unified format for driver.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
commit 13c1cfda1a6cb0325029ce8bbb8d6483244d5c92)
Change-Id: I9659ae150c9d24f2482fd8c285dcfeb65bf873b1
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.
The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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As Temperature is currently represented as int not long in the thermal
framework since use int intead of unsigned long/long to represent
temperature to avoid bogus overheat detection when negative temperature
reported.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.
Moment, we can add the sort mode to be better support the *code_to_temp*
for differenr SoCs.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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We should make the conversion table in as a parameter since the different
SoCs have the different conversionion table.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The current driver is default to register the two thermal sensors
in probe since some SoCs maybe only have one sensor for thermal.
In some cases, the channel 0 is not always the cpu or gpu sensor.
So add the channel can be configured for sensors.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Missing a include file caused compile error.
drivers/thermal/rockchip_thermal.c: In function 'rockchip_thermal_suspend':
drivers/thermal/rockchip_thermal.c:720:2: error: implicit declaration of function 'pinctrl_pm_select_sleep_state' [-Werror=implicit-function-declaration]
...
Fixes: 7e38a5b1daa1 ("thermal: rockchip: support the sleep pinctrl state
to avoid glitches")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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When we come out of system suspend state (S3) the tsadc will have been
reset and back at its default state. While reprogramming the tsadc
it's possible that we'll glitch the output and unintentionally cause
the "over temperature" GPIO to be asserted. Since the over
temperature GPIO is often hooked up to something that will cause a
reboot or shutdown in hardware, this glitch can be catastrophic on
some boards.
We'll add support for selecting the "sleep" pinctrl state at suspend
time. Boards can use this to effectively disable the tsadc at suspend
time and avoid glitches when the system is resumed.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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When requested thermal shutdown signal polarity is low we need to make
sure that the bit representing high level of signal is reset, and not
set all other bits in that register.
Also rename TSADCV2_INT_PD_CLEAR to TSADCV2_INT_PD_CLEAR_MASK to better
reflect its nature.
Acked-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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We attempted to signal invalid code by returning -EAGAIN from
rk_tsadcv2_code_to_temp(), unfortunately the return value was stuffed
directly into the temperature pointer, potentially confusing upper
layers with temperature of -EINVAL.
Let's split temperature from error/success indicator to avoid such
confusion.
Also change the way we scan the temperature table to start with the 2nd
element so that we do not need to worry that we may reference out of
bounds element while doing binary search and keep checking that we end
up with 'mid' equal to 0 (since we are looking for the temperature that
would fall into interval between the 'mid' and 'mid - 1') .
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The thermal code uses int, long and unsigned long for temperatures
in different places.
Using an unsigned type limits the thermal framework to positive
temperatures without need. Also several drivers currently will report
temperatures near UINT_MAX for temperatures below 0°C. This will probably
immediately shut the machine down due to overtemperature if started below
0°C.
'long' is 64bit on several architectures. This is not needed since INT_MAX °mC
is above the melting point of all known materials.
Consistently use a plain 'int' for temperatures throughout the thermal code and
the drivers. This only changes the places in the drivers where the temperature
is passed around as pointer, when drivers internally use another type this is
not changed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Peter Feuerer <peter@piie.net>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Jean Delvare <jdelvare@suse.de>
Cc: Peter Feuerer <peter@piie.net>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-acpi@vger.kernel.org
Cc: platform-driver-x86@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Darren Hart <dvhart@infradead.org>
Cc: lm-sensors@lm-sensors.org
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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There is a copy and paste bug, "->clk" vs "->pclk", so we return the
wrong error code here.
Fixes: cbac8f639437 ('thermal: rockchip: add driver for thermal')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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In general, the kernel should report temperature readings exactly as
reported by the hardware. The cpu / gpu thermal driver works in 5 degree
increments,but we ought to do more accurate. The temperature will do
linear interpolation between the entries in the table.
Test= $md5sum /dev/zero &
$while true; do grep "" /sys/class/thermal/thermal_zone[1-2]/temp;
sleep .5; done
e.g. We can get the result as follows:
/sys/class/thermal/thermal_zone1/temp:39994
/sys/class/thermal/thermal_zone2/temp:39086
/sys/class/thermal/thermal_zone1/temp:39994
/sys/class/thermal/thermal_zone2/temp:39540
/sys/class/thermal/thermal_zone1/temp:39540
/sys/class/thermal/thermal_zone2/temp:39540
/sys/class/thermal/thermal_zone1/temp:39540
/sys/class/thermal/thermal_zone2/temp:39994
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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This platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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