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path: root/drivers/clk/rockchip
AgeCommit message (Expand)Author
2018-12-12clk: rockchip: rk3399: export SCLK_I2SOUT_SRC clk ID for i2sElaine Zhang
2018-12-05clk: rockchip: px30: Export clk id for sclk_i2s0_tx/rx muxSugar Zhang
2018-12-05clk: rockchip: add support for pvtm clkElaine Zhang
2018-11-29Revert "clk: rockchip: fix wrong mmc phase shift for rk3328"Ziyuan Xu
2018-11-27clk/rockchip/rk618: pll: support bypass modeWyon Bi
2018-11-26clk: rockchip: clk-ddr: support DPI connectorWyon Bi
2018-11-23clk: rockchip: rk1808: fix up the mac clk settingElaine Zhang
2018-11-16clk: rockchip: rk1808: fix SCLK_DDRCLK for dmcYouMin Chen
2018-11-15clk: rockchip: rk3308: Set max parent rate of dclk_vop_frac for rk3308bFinley Xiao
2018-11-06clk: rockchip: rk3228: add FRAC_MAX_PRATE limit for spdif/uart/i2s/Elaine Zhang
2018-11-06clk: rockchip: rk3128: add hclk_sfcElaine Zhang
2018-10-26clk: rockchip: rk1808: add pll 100M config parametersElaine Zhang
2018-10-24clk: rockchip: rk1808: add CLK_IGNORE_UNUSED for aclk_pcie_mst/slvElaine Zhang
2018-10-22clk: rockchip: rk1808: remove the apll from parents clk for npuElaine Zhang
2018-10-17clk: rockchip: rk1808: add aclk_imemx CLK_IGNORE_UNUSED flagElaine Zhang
2018-10-16clk: rockchip: rk1808: fix up the clk_pciephy_src parentElaine Zhang
2018-10-16clk: rockchip: rk1808: mark hsclk_imem as critical clockElaine Zhang
2018-10-15clk: rockchip: rk1808: fix mmc clock mux configurationZiyuan Xu
2018-10-15clk: rockchip: fix up the pr_err for fractional div is not allowedElaine Zhang
2018-10-12clk: rockchip: fix wrong mmc phase shift for rk3328Ziyuan Xu
2018-10-11clk: rockchip: rk1808: support npu half dividerElaine Zhang
2018-10-10clk: rockchip: rk1808: add clk ID for clk_rtc32k_fracElaine Zhang
2018-10-09clk: rockchip: rk1808: rename SCLK_GPIO to DBCLK_GPIOElaine Zhang
2018-10-09clk: rockchip: rk1808: add FRAC_MAX_PRATE limit for vop/uart/i2s/pdmElaine Zhang
2018-10-08Revert "clk: rockchip: rk1808: fix PMU_CRU offset"Tao Huang
2018-10-07clk: rockchip: rk1808: mark some clk as critical clocksElaine Zhang
2018-10-07clk: rockchip: rk1808: fix up the uart0 register description errorElaine Zhang
2018-10-06clk: rockchip: rk1808: fix PMU_CRU offsetTao Huang
2018-09-26clk: rockchip: rk1808: fixup wrong id-name for HCLK_I2S1Sugar Zhang
2018-09-21clk: rockchip: rk3308: Fix spi clock's nameFinley Xiao
2018-09-17clk: rockchip: rk3308: Modify parent clock of wifiFinley Xiao
2018-09-17clk: rockchip: rk3308: Add some new clocksFinley Xiao
2018-09-14clk: rockchip: rk1808: add aclk_dmac for dmaElaine Zhang
2018-08-31clk: rockchip: rk1808: add HCLK_NPU clk ID for npuElaine Zhang
2018-08-30clk: rockchip: rk1808: add HCLK_HOST_ARB and PCLK_USB3PHY_PIPE ID for usbElaine Zhang
2018-08-29clk: rockchip: rk1808: modify RGMI to RGMIIJianqun Xu
2018-08-29clk: rockchip: Add divider for backup pll when boostFinley Xiao
2018-08-29clk: rockchip: Add support to get boost configure from devicetreeFinley Xiao
2018-08-22clk: rockchip: px30: Add support to set parent rate for vopl dclkFinley Xiao
2018-08-22clk: rockchip: px30: Let npll only provide clock for vopl and gpuFinley Xiao
2018-08-22clk: rockchip: px30: Remove npll from gpu parent clock on px30Finley Xiao
2018-08-10clk: rockchip: rk3399: fix up some regs description errorElaine Zhang
2018-08-09clk: rockchip: add clock controller for rk1808Elaine Zhang
2018-08-08clk: rockchip: px30: Set max parent rate for uart fractional dividerFinley Xiao
2018-07-31clk: rockchip: px30: Add div50 clocks for sdmmc, emmc, sdio and nandcFinley Xiao
2018-07-26UPSTREAM: clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner
2018-07-25UPSTREAM: clk: rockchip: don't return NULL when failing to register ddrclk br...Shawn Lin
2018-07-25UPSTREAM: clk: rockchip: add ids for rk3399 testclks used for camera handlingEddie Cai
2018-07-25UPSTREAM: clk: rockchip: fix rk3399 aclk_vio gate bitChris Zhong
2018-07-25UPSTREAM: clk: rockchip: use the dclk_vop_frac clock ids on rk3399Yakir Yang