puma-linux.git - Linux kernel for PUMA SOM-RK3399-Q7

Age	Commit message (Expand)	Author
2018-12-21	clk: rockchip: rk3366: add FRAC_MAX_PRATE limit for spdif/uart/i2s	Elaine Zhang
2018-05-17	clk: rockchip: rk3366: mark the aclk_dmac_bus as critical clk	Elaine Zhang
2018-04-02	clk: rockchip: Add supprot to limit input rate for fractional divider	Finley Xiao
2017-09-20	clk: rockchip: rk3366: remove CLK_IGNORE_UNUSED flag from DPHY related clocks	Wyon Bi
2016-11-16	clk: rockchip: add clock ids for efuse on RK3366	Finley Xiao
2016-06-28	clk: rockchip: add clock ids for i2s_src on RK3366	Finley Xiao
2016-04-21	clk: rockchip: rk3366: modify the parent's name of usbphy480m	Finley Xiao
2016-03-23	clk: rockchip: rk3366: modify cpuclk_rate_table	Feng Xiao
2016-03-22	clk: rockchip: rk3366: leave npll for VOP only	Feng Xiao
2016-03-15	UPSTREAM: clk: rockchip: release io resource when failing to init clk	Shawn Lin
2016-03-15	UPSTREAM: clk: rockchip: Add support for multiple clock providers	Xing Zheng
2016-03-15	UPSTREAM: clk: rockchip: allow varying mux parameters for cpuclk pll-sources	Xing Zheng
2016-03-15	UPSTREAM: clk: rockchip: only enter pll slow-mode directly before reboots on ...	Heiko Stuebner
2016-03-14	clk: rockchip: add clock ids for mpll_src and 32k on RK3366	Feng Xiao
2016-03-10	clk: rockchip: add clock ids for isp of RK3366 SoCs	Feng Xiao
2016-03-09	clk: rockchip: add video noc clk to the list of rk3366 critical clocks	Feng Xiao
2016-03-04	clk: rockchip: rk3366: modify hdmi clk according to the latest cru document	Feng Xiao
2016-03-03	clk: rockchip: rk3366: pll's rate support 480MHz 520MHz 576MHz 750Mhz	Feng Xiao
2016-02-24	clk: rockchip: rk3366: add sclk_pvtm_pmu	Xiao Feng
2016-02-23	clk: rockchip: rk3366: include downstream muxes into fractional dividers	Xiao Feng
2016-02-16	clk: rockchip: add rk3366 clock controller	Xiao Feng