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Change-Id: Ifb9c18be4cc7fc3d663101c41e3c0be9eff513d4
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
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devicelist: backlight\key\wifi\bt\sdmmc\touchpad\gsensor\fiq
Change-Id: I303c91ebca0b6d2ec9d452395e470fdd574e6fef
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
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Change-Id: Idf22f326c457c6b658269070b4fd2d5e71a9f62f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
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Change-Id: I92c6bfe60dfe0c89befddad528c8d41a2318567a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
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and some sensors
Change-Id: I8be884069341680c09c7bccd0e17b6faff0a681b
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
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tc358749 enabled with rockchip-isp1 driver
Change-Id: I94c36f2d78cb190436e974bd47500dbbce18deae
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
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There are many isp driver in 4.4 kernel, let's add a dtsi
to help switch between them.
Change-Id: Ida1af575b6c64ffec56ad695933dfdf22cdd72c1
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
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CVE-2017-13218
Change-Id: I6005a6e944494257bfc2243fde2f7a09c3fd76c6
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We now trap accesses to CNTVCT_EL0 when the counter is broken
enough to require the kernel to mediate the access. But it
turns out that some existing userspace (such as OpenMPI) do
probe for the counter frequency, leading to an UNDEF exception
as CNTVCT_EL0 and CNTFRQ_EL0 share the same control bit.
The fix is to handle the exception the same way we do for CNTVCT_EL0.
Fixes: a86bd139f2ae ("arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled")
Reported-by: Hanjun Guo <guohanjun@huawei.com>
Tested-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
(cherry picked from commit 9842119a238bfb92cbab63258dabb54f0e7b111b)
CVE-2017-13218
Change-Id: I2f163e2511bab6225f319c0a9e732735cbd108a0
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Since people seem to make a point in breaking the userspace visible
counter, we have no choice but to trap the access. Add the required
handler.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
(cherry picked from commit 6126ce0588eb5a0752d5c8b5796a7fca324fd887)
CVE-2017-13218
Change-Id: I0705f47c85a78040df38df18f51a4a22500b904d
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Change-Id: I693f3ec61b8a2cadc5d4c461149a54d8c6332eec
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
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add vpu_combo consist of avsd and vdpu
Change-Id: Ib49238d6a187dd7d621ad40ee0635b74825931f8
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
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Change-Id: I5807d47085291efcd8eea61e59e931615b283ba5
Signed-off-by: Liang Chen <cl@rock-chips.com>
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according kernel-3.10 below commit to update
16ceab7 ARM: dts: rockchip: update rk322xh-dram-2layer-timing
Change-Id: I7ed708704adce3d1dfec6b2d8008e2474621a576
Signed-off-by: CanYang He <hcy@rock-chips.com>
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Change-Id: I5e153efcdd1b839ddd412c2c0e6b15c69c4fa6b4
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
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400MHz and 600MHz aren't supported at present.
Change-Id: I2420866243bcf389c1f4ae68f322639986d3e41d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
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It's a Designware MIPI D-PHY, used by ISP in rk3288.
(am from https://patchwork.kernel.org/patch/10119093/)
Change-Id: Ib3386c9c8b58242a2a09bcd3bc7bd66589053a9b
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
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Change-Id: I28a77d09a6cd21aff9099247594323b8bff595dc
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
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add power model for dmc and add dmc as a cooling device in thermal
control
Change-Id: I175e503b671be27e777693745a127a7830c6e829
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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add power model for rkvdec and add rkvdec as a cooling device in thermal
control
Change-Id: I4560f9b2a6b395d565652549a8f0dbcc1903da6f
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
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According to the actual schematic designed by kylin board, update and
rename the regulators for rk808 node information.
Especially gpu regulator voltage, the schematic didn't have this
regulator, this regulaor should be applied by cpu regulator since the
cpu/gpu/ddr are belong to the same logic power supply.
Change-Id: I39e4cf18969391da396cc775f8660701e42977bd
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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Change-Id: I3e23ec65e78534abfc67b33eea25f06b9966b541
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
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Change-Id: I39fd391be0674116e0e329ab950e341eb37cdf60
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
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Change-Id: Ifed5ba59ba2ca7d527e1747ccfa962b353062c0d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: I5eae4d300fe8f2057ce4ee9fcbb5144cdae1a4d9
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: I832fe95e886b5c33cc618edb24fffc2bfbb3b25f
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: I456a74303595c33ec66e9c2aa19af1f9b68155b2
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: I97ed22688ab57cdc602f07b3226622cae8b09910
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: I8773926b52e1e3be8ea967ffc93a85777417c520
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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Change-Id: Ie9ad47027f474b0b07f7c3979b5a83184ac5091a
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
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Having IPI_CPU_BACKTRACE as SGI15 may not work if the kernel is
running in non-secure mode and that the secure firmware has
decided to follow ARM's recommendations that SGI8-15 should
be reserved for secure purpose.
Now that we are "only" using SGI0-6, change IPI_CPU_BACKTRACE
to use SGI7, which makes it more likely to work.
Change-Id: I11e99a59024f1d256b45ede9cc2a89bb4d3dc1ae
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit e7273ff49acf58a5ca9c656f3f0a5dd713390853)
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Since 9a46ad6d6df3 ("smp: make smp_call_function_many() use logic
similar to smp_call_function_single()"), the core IPI handling
has been simplified, and generic_smp_call_function_interrupt is
now the same as generic_smp_call_function_single_interrupt.
This means that one of IPI_CALL_FUNC and IPI_CALL_FUNC_SINGLE has
become redundant. We can then safely drop IPI_CALL_FUNC_SINGLE,
and use only IPI_CALL_FUNC.
This has the advantage of reducing the number of SGI IDs we're using
(a fairly scarse resource).
Tested on a dual A7 board.
Change-Id: I279a90b950c713e822bc4db9844788d7c05e7d77
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 89d798b73dc64b3be2a653cabb4cb622675a9a36)
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cpu0-supply is for older DTs, we had better use new name from now on.
Change-Id: Icb80f5ad4718aeb1e112f317883a0cc756a5eaef
Signed-off-by: Liang Chen <cl@rock-chips.com>
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Change-Id: I74fef189bfc0f2a3de683d8ae2fbedfd8fc88c99
Signed-off-by: Liang Chen <cl@rock-chips.com>
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Change-Id: I6532bf28b905351609a164f1c17898fb8ab1bdea
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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Change-Id: I4abce86be1ba2a697145619ffc587da166926717
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
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Add an intermediate opp so that rkvdec clock rate can be set to
an intermediate rate when temperature is above the trip point.
Change-Id: Ia94910185c708a501072c5da8aaebfcb206ad76b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
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Change-Id: Ib27fa6c0475b060a4af5d79cc0e158070efbeceb
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
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Change-Id: Icb50d82738bc88e7d8f29fdda925a34a70c6c293
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
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Change-Id: I862ea611490306398d685427a53b475f755640e5
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
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Change-Id: I0dbd1b71e2d57aa6c25fb6897253e0aae9d5966b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
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This change adds USB-PHY output clock reference for EHCI and OHCI.
Change-Id: I39e91fed99756a86c83fe9332587c6630a5e5853
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
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The otgphy clocks really only drive the phy blocks. These in turn
contain plls that then generate the 480m clocks the clock controller
uses to supply some other clocks like uart0, gpu or the video-codec.
So fix this structure to actually respect that hirarchy and removed
that usb480m fixed-rate clock working as a placeholder till now, as
this wouldn't even work if the supplying phy gets turned off while
its pll-output gets used elsewhere.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Michael Turquette <mturquette@baylibre.com>
(cherry picked from commit 219a5859c855b1e6e2663eb63a7f942a6bbdfb52)
Conflicts:
drivers/clk/rockchip/clk-rk3188.c
Change-Id: Ib7dce56943e2642833285fb89dd1aeb9328f84a7
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
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This has been done in drivers/cpufreq/rockchip-cpufreq.c
Change-Id: Ie3142f1db99560e596706871a67af6e2e06f5153
Signed-off-by: Liang Chen <cl@rock-chips.com>
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except add note to existing dts file, also add ddr timing and de-skew's
dts file.
Change-Id: I92b7e9c2c6572babd4be00beadbbb75aae431707
Signed-off-by: CanYang He <hcy@rock-chips.com>
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Change-Id: Ie8d1530338b76ca68e2020519eb6521c1afe1cd4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: Ib06f6c7087f230f1523b456ea0a793a533008840
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
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Change-Id: I3f7fe099d30c5d7475f1c64e6483a38dbbd2bb96
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
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Change-Id: I02c672fe9e63b8f6c379a29f9554f9e43b207834
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
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Change-Id: I3eb9ac9abe361762d3d789192c400c3c7abb7f6d
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
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