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9 daysTSD: arm64: configs: resync defconfig for Puma RK3399stable-4.4-rk3399-linux-v2.1x-20190705-somQuentin Schulz
Let's sync the defconfig for Puma RK3399 with make puma-rk3399_defconfig make savedefconfig This will allow our CI to pass again. Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 daysTSD: Makefile: ignore more GCC warningsQuentin Schulz
This kernel branch is outdated and not supported, but it's still interesting to compile every now and then to check mainline against Rockchip downstream kernel we used to bring up Puma. Therefore, let's ignore all those warnings from newer GCCs since we won't fix them anyway. Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
9 daysUPSTREAM: scripts/dtc: Remove redundant YYLOC global declarationDirk Mueller
commit e33a814e772cdc36436c8c188d8c42d019fda639 upstream. gcc 10 will default to -fno-common, which causes this error at link time: (.text+0x0): multiple definition of `yylloc'; dtc-lexer.lex.o (symbol from plugin):(.text+0x0): first defined here This is because both dtc-lexer as well as dtc-parser define the same global symbol yyloc. Before with -fcommon those were merged into one defintion. The proper solution would be to to mark this as "extern", however that leads to: dtc-lexer.l:26:16: error: redundant redeclaration of 'yylloc' [-Werror=redundant-decls] 26 | extern YYLTYPE yylloc; | ^~~~~~ In file included from dtc-lexer.l:24: dtc-parser.tab.h:127:16: note: previous declaration of 'yylloc' was here 127 | extern YYLTYPE yylloc; | ^~~~~~ cc1: all warnings being treated as errors which means the declaration is completely redundant and can just be dropped. Signed-off-by: Dirk Mueller <dmueller@suse.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [robh: cherry-pick from upstream] Cc: stable@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> [nc: Also apply to dtc-lexer.lex.c_shipped due to a lack of e039139be8c2, where dtc-lexer.l started being used] Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit ce513359d8507123e63f34b56e67ad558074be22) Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2019-10-21arm64: lion: Enable CPU errata workarounds.Christoph Muellner
This patch enables CPU errata workarounds in the kernel for the Lion board. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-09gt9xx: Allow DTS to reverse x/y coordinates.Christoph Muellner
This patch adds two flags "reverse-x" and "reverse-y", which can be used to reverse the X or Y coordinates reported by the gt9xx. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02vhost: Fix compilation issue.Christoph Muellner
This patch addresses a compilation issues with vhost.c. drivers/vhost/vhost.c: In function 'vhost_copy_to_user': drivers/vhost/vhost.c:743:22: warning: passing argument 1 of 'copy_to_iter' discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] error, forbidden warning:vhost.c:743 ret = copy_to_iter(from, size, &t); ^~~~ In file included from include/linux/vringh.h:28:0, from include/linux/virtio.h:11, from include/linux/virtio_config.h:6, from ./include/uapi/linux/vhost.h:16, from drivers/vhost/vhost.c:15: include/linux/uio.h:85:8: note: expected 'void *' but argument is of type 'const void *' size_t copy_to_iter(void *addr, size_t bytes, struct iov_iter *i); ^~~~~~~~~~~~ scripts/Makefile.build:277: recipe for target 'drivers/vhost/vhost.o' failed Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02arm64: dts: Add support for RK3368-uQ7/lion SoM.Christoph Muellner
The RK3368-uQ7 (Lion) is a system-on-module featuring the Rockchip RK3368 in a micro-Qseven-compatible form-factor. RK3368-uQ7 features: * CPU: Octa-Core ARM Cortex-A53, up to 1.2 GHz * 4x Cortex-A53 (32KB+32KB L1 cache and 512KB L2 cache, big cluster) * 4x Cortex-A53 (32KB+32KB L1 cache and 256KB L2 cache, LITTLE cluster) * GPU: Imagination Technologies PowerVR SGX6110 Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02dts: rk3368: Set UART pinctrl information.Christoph Muellner
The uartN definitions in the rk3368.dtsi does not contain a reference to the pinctrl information. The requires board files to add these references. This is contrary to other DTSI files like the rk3399.dtsi. This patch adds the missing information. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02dts: rk3368: Remove links to eFuse information.Christoph Muellner
The operating point description of the RK3368 contains links to eFuse information in order to adjust the OPs according to actual SoC characteristics, which can be read out from the eFuses. However, the read-out of eFuse information is only possible from secure mode. Therefore this information has be fetched via SMC calls. The current implementation to get these information requires transparent read/write access to the (secure) eFuse block. I.e. function calls sip_smc_secure_reg_write() and sip_smc_secure_reg_read(). This approach has several disadvantages: 1) security of the secure eFuse block is completely undermined, 2) no implementation in upstream ATF/Optee. As there is no robust solution to read out the required information, we simply drop the feature with the effect, that the worst characteristics of the SoC are assumed. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02thermal: rk3368: Remove SCPI calls.Christoph Muellner
SCPI calls can be used if there's an backend existing backend available. However, since mainline ATF does not provide this service, we disable SCPI calls to not fail during driver probing. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02rk3368: grf: Switch PWM to RK_PWM.Christoph Muellner
The RK3368's GRF has the bit 'pwm_sel' in GRF_SOC_CON15, which defines the active PWM controller. By default this is the DW_PWM block. Contrary to that the DTSI only lists the RK_PWM block. The effect of that is, that PWM does not work as expected on the RK3368. Although the PWM counter registers shows that the PWM controller is working as expected, there is no PWM output on the corresponding PWM pin. This patch switches the PWM source to the RK_PWM block during bootup with the effect, that the RK_PWM block can be used (as specified in the DTSI). Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02usb: dwc_otg_310: Prevent phy access if not probed.Christoph Muellner
In case the PHY is not successfully probed, we cannot access PHY functions like usb20otg_hw_init(), because they assume successful probing and might dereference NULL pointers otherwise. This patch addresses this by introducing a flag 'is_probed', which can be checked during controller probing time to verify, that the PHY has been probed. If this was not the case, controller probing will be deferred. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02stmmac_mdio: Re-enable mdio bus scanning if no PHY in DTS.Christoph Muellner
A previous patch disabled PHY probing in case a PHY is specified in the DTS. However, it also broke mdio bus registration for the case that no PHY is specified in the DTS (i.e. when PHY probing is what we want). This patch solves this issue by fixing the mdio bus registration code properly. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: stmmac: Backport mdio logic from mainline.Christoph Muellner
* net: stmmac: Don't search for phys if mdio node is defined. * Invoke of_mdiobus_register() instead of mdiobus_register() to pass DT to phy driver. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02stmmac: Backport mdio/phy processing logic from mainline.Christoph Muellner
The mainline driver allows to specifiy a 'snps,dwmac-mdio' subnode in the DT, which can then specify the phy and its properties. This patch backports this feature. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: mscc: Resolve backport conflicts.Christoph Muellner
This patch contains no functional changes. It just includes the fixes for backporting the PHY driver. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Cleanup cherry-pick artefacts.Christoph Muellner
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: hack for Lion v2.0: enable VSC8531 125 MHz clock outputJakob Unterwurzacher
We need the phy to generate the 125 mhz clock, and there does not seem to be a way to activiate it via the DTS. Hardcode it for now. After this patch, ethernet works fine: root@rk3368-uq7:~# iperf -c crompton.lan ------------------------------------------------------------ Client connecting to crompton.lan, TCP port 5001 TCP window size: 85.0 KByte (default) ------------------------------------------------------------ [ 3] local 10.2.191.136 port 36070 connected with 10.2.0.1 port 5001 [ ID] Interval Transfer Bandwidth [ 3] 0.0-10.0 sec 1.09 GBytes 939 Mbits/sec Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: mscc: the extended page access register is 16 bitsQuentin Schulz
The Extended Page Access is a 16-bit register, so change the page parameter of vsc85xx_phy_page_set to a u16. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Add LED mode driver for Microsemi PHYs.Raju Lakkaraju
LED Mode: Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different status information that can be selected by setting LED mode. LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get from Device Tree. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Add mdi(x) support in Microsemi PHYs driverRaju Lakkaraju
To connect two ports of the same configuration (MDI to MDI or MDI-X to MDI-X) with a 10/100/1000 Mbit/s connection, an Ethernet crossover cable is needed to cross over the transmit and receive signals in the cable, so that they are matched at the connector level. When connecting an MDI port to an MDI-X port a straight through cable is used while to connect two MDI ports or two MDI-X ports a crossover cable must be used. Conventionally MDI is used on end devices while MDI-X is used on hubs and switches Auto MDI-X automatically detects the required cable connection type and configures the connection appropriately, removing the need for crossover cables to interconnect switches or connecting PCs peer-to-peer. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Add support for Microsemi VSC 8530/40 Fast Ethernet PHYRaju Lakkaraju
Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: Allan W. Nielsen <allan.nielsen@microsemi.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Cleanup the Edge-Rate feature in Microsemi PHYs.Allan W. Nielsen
Edge-Rate cleanup include the following: - Updated device tree bindings documentation for edge-rate - The edge-rate is now specified as a "slowdown", meaning that it is now being specified as positive values instead of negative (both documentation and implementation wise). - Only explicitly documented values for "vsc8531,vddmac" and "vsc8531,edge-slowdown" are accepted by the device driver. - Deleted include/dt-bindings/net/mscc-phy-vsc8531.h as it was not needed. - Read/validate devicetree settings in probe instead of init Signed-off-by: Allan W. Nielsen <allan.nielsen@microsemi.com> Signed-off-by: Raju Lakkaraju <raju.lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Add Wake-on-LAN driver for Microsemi PHYs.Raju Lakkaraju
Wake-on-LAN (WoL) is an Ethernet networking standard that allows a computer/device to be turned on or awakened by a network message. VSC8531 PHY can support this feature configure by driver set function. WoL status get by driver get function. Tested on Beaglebone Black with VSC 8531 PHY. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Add Edge-rate driver for Microsemi PHYs.Raju Lakkaraju
Edge-rate: As system and networking speeds increase, a signal's output transition, also know as the edge rate or slew rate (V/ns), takes on greater importance because high-speed signals come with a price. That price is an assortment of interference problems like ringing on the line, signal overshoot and undershoot, extended signal settling times, crosstalk noise, transmission line reflections, false signal detection by the receiving device and electromagnetic interference (EMI) -- all of which can negate the potential gains designers are seeking when they try to increase system speeds through the use of higher performance logic devices. The fact is, faster signaling edge rates can cause a higher level of electrical noise or other type of interference that can actually lead to slower line speeds and lower maximum system frequencies. This parameter allow the board designers to change the driving strange, and thereby change the EMI behavioral. Edge-rate parameters (vddmac, edge-slowdown) get from Device Tree. Tested on Beaglebone Black with VSC 8531 PHY. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Add MAC-IF driver for Microsemi PHYs.Raju Lakkaraju
All the review comments updated and resending for review. This is MAC interface feature. Microsemi PHY can support RGMII, RMII or GMII/MII interface between MAC and PHY. MAC-IF function program the right value based on Device tree configuration. Tested on Beaglebone Black with VSC 8531 PHY. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: Fixed checkpatch errors for Microsemi PHYs.Raju Lakkaraju
The existing VSC85xx PHY driver did not follow the coding style and caused "checkpatch" to complain. This commit fixes this. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02net: phy: initialize rc to zero to avoid returning garbage valueColin Ian King
In the case where phydev->interrupts is not PHY_INTERRUPT_ENABLED function vsc85xx_ack_interrupt is returning an uninitialized garbage value. Fix this by initializing rc to zero. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02Microsemi VSC 8531/41 PHY DriverRaju Lakkaraju
Hello, I added all review comments and re-sending for review. >From a5017f5878a92d2acec86a6a29b1498c457cb73a Mon Sep 17 00:00:00 2001 From: Nagaraju Lakkaraju <Raju.Lakkaraju@microsemi.com> Date: Wed, 3 Aug 2016 18:28:24 +0530 Subject: [PATCH v2] net: phy: Add drivers for Microsemi PHYs Signed-off-by: Nagaraju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02dts: px30-evb: Deactivate gmac.Christoph Muellner
We observe constant crashes in the ethernet driver when enabling the network interface. As we only have limited information about the board available, this does not seem to be a reasonable target for debugging. Therefore we deactivate the network interface. Crash log header: [ 8.235034] rk_gmac-dwmac ff360000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off [ 11.256696] NETDEV WATCHDOG: eth0 (rk_gmac-dwmac): transmit queue 0 [ 11.264514] ------------[ cut here ]------------ [ 11.269481] WARNING: at net/sched/sch_generic.c:306 Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02dts: rk3326-linux: Switching to UART5/115200.Christoph Muellner
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02px30: disable WiFi as it does not compile.Christoph Muellner
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02rk3399-puma-mipidsi.dts: add comment about display modelJakob Unterwurzacher
The dts only works with this specific display model. It makes sense to write down which one. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2019-10-02rk3399-puma.dts: reduce eMMC max-frequency to 100 MHz.Christoph Muellner
We've observed that on boards with a 32 GiB eMMC configuration the communication with 200 MHz is not fully reliable. Therefore we use the more defensive 100 MHz clock speed the default. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02rk3399-puma.dts: Disable DMC.Christoph Muellner
The DMC feature allows to reduce certain clocks in the SoC to save power when not needed. However, this feature is quite unreliable at the moment, as not all cases are properly detected when the full clock speed is required. The consequence is, that we have several reports of system hangs (e.g. when enabling camera streaming or even simply booting up the system). To circumvent these issues, this commit disables DMC. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02ucan: Add old driver to support legacy (pre v3.0) devices.Christoph Muellner
A previous commit updated the ucan driver to the one from mainline Linux. Unfortunately the updated driver does not support the old v2.0 devices, which breaks environments where such devices are deployed and cannot be updated. Therefore this patch adds the old driver back as ucan_legacy. Besides the USB PID/VID combination it will match for device versions from 0x0000 to 0x02ff (the new ucan driver will test for 0x0300+). Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02ucan: Add version matching to enumerate only v3.0+ devices.Christoph Muellner
This patch extends the USB device ID table of the ucan driver to match for the device version as well. Only devices with a firmware version of 3.0 or higher will match. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02ucan: Backporting UCAN driver from Linux 5.1-rc1.Christoph Muellner
This patch updates the UCAN driver to the improved version, which has been mainlined. Besides addressing stabilization issues this driver update also adds support for more recent firmware versions of Seal and Mule. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02can: ucan: add driver for Theobroma Systems UCAN devicesJakob Unterwurzacher
The UCAN driver supports the microcontroller-based USB/CAN adapters from Theobroma Systems. There are two form-factors that run essentially the same firmware: * Seal: standalone USB stick ( https://www.theobroma-systems.com/seal ) * Mule: integrated on the PCB of various System-on-Modules from Theobroma Systems like the A31-µQ7 and the RK3399-Q7 ( https://www.theobroma-systems.com/rk3399-q7 ) The USB wire protocol has been designed to be as generic and hardware-indendent as possible in the hope of being useful for implementation on other microcontrollers. Signed-off-by: Martin Elshuber <martin.elshuber@theobroma-systems.com> Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-10-02rk: clk: Allow clk_i2s0_frac to violate precision restriction.Christoph Muellner
The fraction approximation code for rockchip frac dividers impose the following requirement (as noted in a driver comment): fractional divider must set that denominator is 20 times larger than numerator to generate precise clock frequency. Additionally the frac driver limits the maximum input frequency to 600 MHz. This limitation can be achieved by using the integer divider (limiting to e.g. 400 MHz). Note, that both restrictions are not stated in the RK3399 TRM. The implication of these restrictions are, that the range of possible output frequencies is reduced quite drastically. This results in the problem, that clk_i2s0_frac cannot generate a clock of 24.56 MHz and thus audio on RK3399-Q7 is broken. Therefore this patch whitelists clk_i2s0_frac from the first restriction, similar to the exception for UART (in the same function). Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02mtd: spi-nor: add GigaDevice gd25lq32Jakob Unterwurzacher
This is the 1.8V version of the gd25q32.
2019-10-02arm64: dts: rockchip: Decrease emmc-phy's drive impedance on rk3399-pumaChristoph Muellner
The RK3399-Q7 (Puma) requires 33 Ohm drive strength to ensure signal integrity at HS-400 (200MHz clock, DDR signalling). A repeated EMC testing run validates that this increase does not negatively impact EMC compliance (emissions have ample distance to the regulatory limits). Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2019-10-02dt-bindings: phy: Add a new property drive-impedance-ohm for RK's emmc PHYChristoph Muellner
This patch documents the new proprty drive-impedance-ohm for Rockchip's eMMC PHY node. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-10-02phy: rockchip-emmc: Allow to set drive impedance via DTS.Christoph Muellner
The rockchip-emmc PHY can be configured with different drive impedance values. Currenlty a value of 50 Ohm is hard coded into the driver. This patch introduces the DTS property 'drive-impedance-ohm' for the rockchip-emmc phy node, which uses the value from the DTS to setup the drive impedance accordingly. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2019-10-02arm64: DTS: rk3399-puma.dts: Update DMC OPs.Christoph Muellner
Extending the operating point list of the DMC to include frequencies of up to 800 MHz. This increases bandwidth and fixes issues observed with RKISP1 (PIC_SIZE_ERRORs when performing memory intensive tasks in parallel). Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02arm64: DTS: rk3399-puma.dts: Rename efuse_id to cpu_id.Christoph Muellner
This patch is required because the name of the "efuse_id" node has been changed to "cpu_id" in the rk3399.dtsi by the following commit: commit 1eefebf4c678d63d1051a38f6ffd06eb1bd66fe0 Author: Jianqun Xu <jay.xu@rock-chips.com> Date: Tue Jul 24 15:56:18 2018 +0800 Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02gpu: mali: Fix signature of kbase_get_[static|dynamic]_power functions.Christoph Muellner
This addresses a type warning, which elevates to a broken build because of -Werror: CC drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.o drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c:582:22: warning: initialization from incompatible pointer type [-Wincompatible-pointer-types] error, forbidden warning:mali_kbase_ipa.c:582 .get_static_power = &kbase_get_static_power, ^ drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c:582:22: note: (near initialization for ‘kbase_ipa_power_model_ops.get_static_power’) drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c:583:23: warning: initialization from incompatible pointer type [-Wincompatible-pointer-types] error, forbidden warning:mali_kbase_ipa.c:583 .get_dynamic_power = &kbase_get_dynamic_power, ^ drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c:583:23: note: (near initialization for ‘kbase_ipa_power_model_ops.get_dynamic_power’) scripts/Makefile.build:277: recipe for target 'drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.o' failed Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02devfreq: rockchip: Fix unprotected call to smp_processor_id().Christoph Muellner
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-10-02rk3399-puma.dts: reduce sd card max-frequency to 40MHz.Jakob Unterwurzacher
CRC errors (code -84 EILSEQ) have been observed for some SanDisk Ultra A1 cards when running at 50MHz. Waveform analysis suggest that the level shifters that are used on the RK3399-Q7 module for voltage translation between 3.0 and 3.3V don't handle clock rates at or above 48MHz properly. Back off to 40MHz for some safety margin. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2019-10-02rk3399_defconfig: enable ISP1 and TC35874X for peafowl hdmi captureJakob Unterwurzacher