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-rw-r--r--sound/soc/rockchip/rockchip_i2s_tdm.h98
1 files changed, 98 insertions, 0 deletions
diff --git a/sound/soc/rockchip/rockchip_i2s_tdm.h b/sound/soc/rockchip/rockchip_i2s_tdm.h
index 9f6086feba8c..888ae02106ee 100644
--- a/sound/soc/rockchip/rockchip_i2s_tdm.h
+++ b/sound/soc/rockchip/rockchip_i2s_tdm.h
@@ -280,4 +280,102 @@ enum {
#define I2S_TDM_RXCR (0x0034)
#define I2S_CLKDIV (0x0038)
+/* PX30 GRF CONFIGS*/
+#define PX30_I2S0_CLK_IN_SRC_MASK GENMASK(13, 12)
+#define PX30_I2S0_CLK_IN_SRC_FROM_TX (0x1 << 12)
+#define PX30_I2S0_CLK_IN_SRC_FROM_RX (0x2 << 12)
+#define PX30_I2S0_MCLK_OUT_SRC_MSK BIT(5)
+#define PX30_I2S0_MCLK_OUT_SRC_FROM_TX BIT(5)
+#define PX30_I2S0_MCLK_OUT_SRC_FROM_RX 0
+
+#define PX30_I2S0_CLK_MSK \
+ (PX30_I2S0_MCLK_OUT_SRC_MSK | \
+ PX30_I2S0_CLK_IN_SRC_MASK)
+
+#define PX30_I2S0_CLK_TXONLY \
+ (PX30_I2S0_MCLK_OUT_SRC_FROM_TX | \
+ PX30_I2S0_CLK_IN_SRC_FROM_TX | \
+ (PX30_I2S0_CLK_MSK << 16))
+
+#define PX30_I2S0_CLK_RXONLY \
+ (PX30_I2S0_MCLK_OUT_SRC_FROM_RX | \
+ PX30_I2S0_CLK_IN_SRC_FROM_RX | \
+ (PX30_I2S0_CLK_MSK << 16))
+
+/* RK1808 GRF CONFIGS*/
+#define RK1808_I2S0_MCLK_OUT_SRC_MSK BIT(2)
+#define RK1808_I2S0_MCLK_OUT_SRC_FROM_RX BIT(2)
+#define RK1808_I2S0_MCLK_OUT_SRC_FROM_TX 0
+#define RK1808_I2S0_CLK_IN_SRC_MASK GENMASK(1, 0)
+#define RK1808_I2S0_CLK_IN_SRC_FROM_TX (0x1 << 0)
+#define RK1808_I2S0_CLK_IN_SRC_FROM_RX (0x2 << 0)
+
+#define RK1808_I2S0_CLK_MSK \
+ (RK1808_I2S0_MCLK_OUT_SRC_MSK | \
+ RK1808_I2S0_CLK_IN_SRC_MASK)
+
+#define RK1808_I2S0_CLK_TXONLY \
+ (RK1808_I2S0_MCLK_OUT_SRC_FROM_TX | \
+ RK1808_I2S0_CLK_IN_SRC_FROM_TX | \
+ (RK1808_I2S0_CLK_MSK << 16))
+
+#define RK1808_I2S0_CLK_RXONLY \
+ (RK1808_I2S0_MCLK_OUT_SRC_FROM_RX | \
+ RK1808_I2S0_CLK_IN_SRC_FROM_RX | \
+ (RK1808_I2S0_CLK_MSK << 16))
+
+/* RK3308 GRF CONFIGS*/
+#define RK3308_I2S0_8CH_MCLK_OUT_SRC_MSK BIT(10)
+#define RK3308_I2S0_8CH_MCLK_OUT_SRC_FROM_RX BIT(10)
+#define RK3308_I2S0_8CH_MCLK_OUT_SRC_FROM_TX 0
+#define RK3308_I2S0_8CH_CLK_IN_RX_SRC_MSK BIT(9)
+#define RK3308_I2S0_8CH_CLK_IN_RX_SRC_FROM_TX BIT(9)
+#define RK3308_I2S0_8CH_CLK_IN_RX_SRC_FROM_RX 0
+#define RK3308_I2S0_8CH_CLK_IN_TX_SRC_MSK BIT(8)
+#define RK3308_I2S0_8CH_CLK_IN_TX_SRC_FROM_RX BIT(8)
+#define RK3308_I2S0_8CH_CLK_IN_TX_SRC_FROM_TX 0
+#define RK3308_I2S1_8CH_MCLK_OUT_SRC_MSK BIT(2)
+#define RK3308_I2S1_8CH_MCLK_OUT_SRC_FROM_RX BIT(2)
+#define RK3308_I2S1_8CH_MCLK_OUT_SRC_FROM_TX 0
+#define RK3308_I2S1_8CH_CLK_IN_RX_SRC_MSK BIT(1)
+#define RK3308_I2S1_8CH_CLK_IN_RX_SRC_FROM_TX BIT(1)
+#define RK3308_I2S1_8CH_CLK_IN_RX_SRC_FROM_RX 0
+#define RK3308_I2S1_8CH_CLK_IN_TX_SRC_MSK BIT(0)
+#define RK3308_I2S1_8CH_CLK_IN_TX_SRC_FROM_RX BIT(0)
+#define RK3308_I2S1_8CH_CLK_IN_TX_SRC_FROM_TX 0
+
+#define RK3308_I2S0_CLK_MSK \
+ (RK3308_I2S0_8CH_MCLK_OUT_SRC_MSK | \
+ RK3308_I2S0_8CH_CLK_IN_RX_SRC_MSK | \
+ RK3308_I2S0_8CH_CLK_IN_TX_SRC_MSK)
+
+#define RK3308_I2S0_CLK_TXONLY \
+ (RK3308_I2S0_8CH_MCLK_OUT_SRC_FROM_TX | \
+ RK3308_I2S0_8CH_CLK_IN_RX_SRC_FROM_TX | \
+ RK3308_I2S0_8CH_CLK_IN_TX_SRC_FROM_TX | \
+ (RK3308_I2S0_CLK_MSK << 16))
+
+#define RK3308_I2S0_CLK_RXONLY \
+ (RK3308_I2S0_8CH_MCLK_OUT_SRC_FROM_RX | \
+ RK3308_I2S0_8CH_CLK_IN_RX_SRC_FROM_RX | \
+ RK3308_I2S0_8CH_CLK_IN_TX_SRC_FROM_RX | \
+ (RK3308_I2S0_CLK_MSK << 16))
+
+#define RK3308_I2S1_CLK_MSK \
+ (RK3308_I2S1_8CH_MCLK_OUT_SRC_MSK | \
+ RK3308_I2S1_8CH_CLK_IN_RX_SRC_MSK | \
+ RK3308_I2S1_8CH_CLK_IN_TX_SRC_MSK)
+
+#define RK3308_I2S1_CLK_TXONLY \
+ (RK3308_I2S1_8CH_MCLK_OUT_SRC_FROM_TX | \
+ RK3308_I2S1_8CH_CLK_IN_RX_SRC_FROM_TX | \
+ RK3308_I2S1_8CH_CLK_IN_TX_SRC_FROM_TX | \
+ (RK3308_I2S1_CLK_MSK << 16))
+
+#define RK3308_I2S1_CLK_RXONLY \
+ (RK3308_I2S1_8CH_MCLK_OUT_SRC_FROM_RX | \
+ RK3308_I2S1_8CH_CLK_IN_RX_SRC_FROM_RX | \
+ RK3308_I2S1_8CH_CLK_IN_TX_SRC_FROM_RX | \
+ (RK3308_I2S1_CLK_MSK << 16))
+
#endif /* _ROCKCHIP_I2S_TDM_H */