diff options
Diffstat (limited to 'include/dt-bindings/clock/rockchip,rk3288.h')
| -rw-r--r-- | include/dt-bindings/clock/rockchip,rk3288.h | 220 |
1 files changed, 220 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rockchip,rk3288.h b/include/dt-bindings/clock/rockchip,rk3288.h new file mode 100644 index 000000000000..1a2803c4f168 --- /dev/null +++ b/include/dt-bindings/clock/rockchip,rk3288.h @@ -0,0 +1,220 @@ +#ifndef _DT_BINDINGS_CLOCK_ROCKCHIP_RK3288_H +#define _DT_BINDINGS_CLOCK_ROCKCHIP_RK3288_H + +#include "rockchip.h" + +/* pll id */ +#define RK3288_APLL_ID 0 +#define RK3288_DPLL_ID 1 +#define RK3288_CPLL_ID 2 +#define RK3288_GPLL_ID 3 +#define RK3288_NPLL_ID 4 +#define RK3288_END_PLL_ID 5 + +/* reset id */ +#define RK3288_SOFT_RST_CORE0 0 +#define RK3288_SOFT_RST_CORE1 1 +#define RK3288_SOFT_RST_CORE2 2 +#define RK3288_SOFT_RST_CORE3 3 +#define RK3288_SOFT_RST_CORE0_PO 4 +#define RK3288_SOFT_RST_CORE1_PO 5 +#define RK3288_SOFT_RST_CORE2_PO 6 +#define RK3288_SOFT_RST_CORE3_PO 7 +#define RK3288_SOFT_RST_PD_CORE_STR_SYS_A 8 +#define RK3288_SOFT_RST_PD_BUS_STR_SYS_A 9 +#define RK3288_SOFT_RST_L2C 10 +#define RK3288_SOFT_RST_TOPDBG 11 +#define RK3288_SOFT_RST_CORE0_DBG 12 +#define RK3288_SOFT_RST_CORE1_DBG 13 +#define RK3288_SOFT_RST_CORE2_DBG 14 +#define RK3288_SOFT_RST_CORE3_DBG 15 + +#define RK3288_SOFT_RST_PD_BUS_AHB_ARBITOR 16 +#define RK3288_SOFT_RST_EFUSE_256BIT_P 17 +#define RK3288_SOFT_RST_DMA1 18 +#define RK3288_SOFT_RST_INTMEM 19 +#define RK3288_SOFT_RST_ROM 20 +#define RK3288_SOFT_RST_SPDIF_8CH 21 +#define RK3288_SOFT_RST_TIMER_P 22 +#define RK3288_SOFT_RST_I2S 23 +#define RK3288_SOFT_RST_SPDIF 24 +#define RK3288_SOFT_RST_TIMER0 25 +#define RK3288_SOFT_RST_TIMER1 26 +#define RK3288_SOFT_RST_TIMER2 27 +#define RK3288_SOFT_RST_TIMER3 28 +#define RK3288_SOFT_RST_TIMER4 29 +#define RK3288_SOFT_RST_TIMER5 30 +#define RK3288_SOFT_RST_EFUSE_P 31 + +#define RK3288_SOFT_RST_GPIO0 32 +#define RK3288_SOFT_RST_GPIO1 33 +#define RK3288_SOFT_RST_GPIO2 34 +#define RK3288_SOFT_RST_GPIO3 35 +#define RK3288_SOFT_RST_GPIO4 36 +#define RK3288_SOFT_RST_GPIO5 37 +#define RK3288_SOFT_RST_GPIO6 38 +#define RK3288_SOFT_RST_GPIO7 39 +#define RK3288_SOFT_RST_GPIO8 40 +#define RK3288_SOFT_RST_2RES9 41 +#define RK3288_SOFT_RST_I2C0 42 +#define RK3288_SOFT_RST_I2C1 43 +#define RK3288_SOFT_RST_I2C2 44 +#define RK3288_SOFT_RST_I2C3 45 +#define RK3288_SOFT_RST_I2C4 46 +#define RK3288_SOFT_RST_I2C5 47 + +#define RK3288_SOFT_RST_DW_PWM 48 +#define RK3288_SOFT_RST_MMC_PERI 49 +#define RK3288_SOFT_RST_PERIPH_MMU 50 +#define RK3288_SOFT_RST_DAP 51 +#define RK3288_SOFT_RST_DAP_SYS 52 +#define RK3288_SOFT_RST_TPIU_AT 53 +#define RK3288_SOFT_RST_PMU_P 54 +#define RK3288_SOFT_RST_GRF 55 +#define RK3288_SOFT_RST_PMU 56 +#define RK3288_SOFT_RST_PERIPHSYS_A 57 +#define RK3288_SOFT_RST_PERIPHSYS_H 58 +#define RK3288_SOFT_RST_PERIPHSYS_P 59 +#define RK3288_SOFT_RST_PERIPH_NIU 60 +#define RK3288_SOFT_RST_PD_PERI_AHB_ARBITOR 61 +#define RK3288_SOFT_RST_EMEM_PERI 62 +#define RK3288_SOFT_RST_USB_PERI 63 + +#define RK3288_SOFT_RST_DMA2 64 +#define RK3288_SOFT_RST_4RES1 65 +#define RK3288_SOFT_RST_MAC 66 +#define RK3288_SOFT_RST_GPS 67 +#define RK3288_SOFT_RST_4RES4 68 +#define RK3288_SOFT_RST_RK_PWM 69 +#define RK3288_SOFT_RST_4RES6 70 +#define RK3288_SOFT_RST_CCP 71 +#define RK3288_SOFT_RST_USB_HOST0 72 +#define RK3288_SOFT_RST_EHCI1 73 +#define RK3288_SOFT_RST_EHCI1_AUX 74 +#define RK3288_SOFT_RST_EHCI1PHY 75 +#define RK3288_SOFT_RST_HSADC 76 +#define RK3288_SOFT_RST_NANDC0 77 +#define RK3288_SOFT_RST_NANDC1 78 +#define RK3288_SOFT_RST_4RES15 79 + +#define RK3288_SOFT_RST_TZPC 80 +#define RK3288_SOFT_RST_5RES1 81 +#define RK3288_SOFT_RST_5RES2 82 +#define RK3288_SOFT_RST_SPI0 83 +#define RK3288_SOFT_RST_SPI1 84 +#define RK3288_SOFT_RST_SPI2 85 +#define RK3288_SOFT_RST_5RES6 86 +#define RK3288_SOFT_RST_SARADC 87 +#define RK3288_SOFT_RST_PD_ALIVE_NIU_P 88 +#define RK3288_SOFT_RST_PD_PMU_INTMEM_P 89 +#define RK3288_SOFT_RST_PD_PMU_NIU_P 90 +#define RK3288_SOFT_RST_SECURITY_GRF_P 91 +#define RK3288_SOFT_RST_5RES12 92 +#define RK3288_SOFT_RST_5RES13 93 +#define RK3288_SOFT_RST_5RES14 94 +#define RK3288_SOFT_RST_5RES15 95 + +#define RK3288_SOFT_RST_VIO_ARBI_H 96 +#define RK3288_SOFT_RST_RGA_NIU_A 97 +#define RK3288_SOFT_RST_VIO0_NIU_A 98 +#define RK3288_SOFT_RST_VIO_NIU_H 99 +#define RK3288_SOFT_RST_LCDC0_A 100 +#define RK3288_SOFT_RST_LCDC0_H 101 +#define RK3288_SOFT_RST_LCDC0_D 102 +#define RK3288_SOFT_RST_VIO1_NIU_A 103 +#define RK3288_SOFT_RST_VIP 104 +#define RK3288_SOFT_RST_RGA_CORE 105 +#define RK3288_SOFT_RST_IEP_A 106 +#define RK3288_SOFT_RST_IEP_H 107 +#define RK3288_SOFT_RST_RGA_A 108 +#define RK3288_SOFT_RST_RGA_H 109 +#define RK3288_SOFT_RST_ISP 110 +#define RK3288_SOFT_RST_EDP 111 + +#define RK3288_SOFT_RST_VCODEC_A 112 +#define RK3288_SOFT_RST_VCODEC_H 113 +#define RK3288_SOFT_RST_VIO_H2P_H 114 +#define RK3288_SOFT_RST_MIPIDSI0_P 115 +#define RK3288_SOFT_RST_MIPIDSI1_P 116 +#define RK3288_SOFT_RST_MIPICSI_P 117 +#define RK3288_SOFT_RST_LVDS_PHY_P 118 +#define RK3288_SOFT_RST_LVDS_CON 119 +#define RK3288_SOFT_RST_GPU 120 +#define RK3288_SOFT_RST_HDMI 121 +#define RK3288_SOFT_RST_7RES10 122 +#define RK3288_SOFT_RST_7RES11 123 +#define RK3288_SOFT_RST_CORE_PVTM 124 +#define RK3288_SOFT_RST_GPU_PVTM 125 +#define RK3288_SOFT_RST_7RES14 126 +#define RK3288_SOFT_RST_7RES15 127 + +#define RK3288_SOFT_RST_MMC0 128 +#define RK3288_SOFT_RST_SDIO0 129 +#define RK3288_SOFT_RST_SDIO1 130 +#define RK3288_SOFT_RST_EMMC 131 +#define RK3288_SOFT_RST_USBOTG_H 132 +#define RK3288_SOFT_RST_USBOTGPHY 133 +#define RK3288_SOFT_RST_USBOTGC 134 +#define RK3288_SOFT_RST_USBHOST0_H 135 +#define RK3288_SOFT_RST_USBHOST0PHY 136 +#define RK3288_SOFT_RST_USBHOST0C 137 +#define RK3288_SOFT_RST_USBHOST1_H 138 +#define RK3288_SOFT_RST_USBHOST1PHY 139 +#define RK3288_SOFT_RST_USBHOST1C 140 +#define RK3288_SOFT_RST_USB_ADP 141 +#define RK3288_SOFT_RST_ACC_EFUSE 142 +#define RK3288_SOFT_RST_8RES15 143 + +#define RK3288_SOFT_RST_CORESIGHT 144 +#define RK3288_SOFT_RST_PD_CORE_AHB_NOC 145 +#define RK3288_SOFT_RST_PD_CORE_APB_NOC 146 +#define RK3288_SOFT_RST_PD_CORE_MP_AXI 147 +#define RK3288_SOFT_RST_GIC 148 +#define RK3288_SOFT_RST_LCDCPWM0 149 +#define RK3288_SOFT_RST_LCDCPWM1 150 +#define RK3288_SOFT_RST_VIO0_H2P_BRG 151 +#define RK3288_SOFT_RST_VIO1_H2P_BRG 152 +#define RK3288_SOFT_RST_RGA_H2P_BRG 153 +#define RK3288_SOFT_RST_HEVC 154 +#define RK3288_SOFT_RST_9RES11 155 +#define RK3288_SOFT_RST_9RES12 156 +#define RK3288_SOFT_RST_9RES13 157 +#define RK3288_SOFT_RST_9RES14 158 +#define RK3288_SOFT_RST_TSADC_P 159 + +#define RK3288_SOFT_RST_DDRPHY0 160 +#define RK3288_SOFT_RST_DDRPHY0_P 161 +#define RK3288_SOFT_RST_DDRCTRL0 162 +#define RK3288_SOFT_RST_DDRCTRL0_P 163 +#define RK3288_SOFT_RST_DDRPHY0_CTL 164 +#define RK3288_SOFT_RST_DDRPHY1 165 +#define RK3288_SOFT_RST_DDRPHY1_P 166 +#define RK3288_SOFT_RST_DDRCTRL1 167 +#define RK3288_SOFT_RST_DDRCTRL1_P 168 +#define RK3288_SOFT_RST_DDRPHY1_CTL 169 +#define RK3288_SOFT_RST_DDRMSCH0 170 +#define RK3288_SOFT_RST_DDRMSCH1 171 +#define RK3288_SOFT_RST_10RES12 172 +#define RK3288_SOFT_RST_10RES13 173 +#define RK3288_SOFT_RST_CRYPTO 174 +#define RK3288_SOFT_RST_C2C_HOST 175 + +#define RK3288_SOFT_RST_LCDC1_A 176 +#define RK3288_SOFT_RST_LCDC1_H 177 +#define RK3288_SOFT_RST_LCDC1_D 178 +#define RK3288_SOFT_RST_UART0 179 +#define RK3288_SOFT_RST_UART1 180 +#define RK3288_SOFT_RST_UART2 181 +#define RK3288_SOFT_RST_UART3 182 +#define RK3288_SOFT_RST_UART4 183 +#define RK3288_SOFT_RST_11RES8 184 +#define RK3288_SOFT_RST_11RES9 185 +#define RK3288_SOFT_RST_SIMC 186 +#define RK3288_SOFT_RST_PS2C 187 +#define RK3288_SOFT_RST_TSP 188 +#define RK3288_SOFT_RST_TSP_CLKIN0 189 +#define RK3288_SOFT_RST_TSP_CLKIN1 190 +#define RK3288_SOFT_RST_TSP_27M 191 + + +#endif /* _DT_BINDINGS_CLOCK_ROCKCHIP_RK3288_H */ |