diff options
Diffstat (limited to 'drivers/clk/rockchip/clk-rk3366.c')
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3366.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/rockchip/clk-rk3366.c b/drivers/clk/rockchip/clk-rk3366.c index 3b18ac08c1ed..22032a1a68f2 100644 --- a/drivers/clk/rockchip/clk-rk3366.c +++ b/drivers/clk/rockchip/clk-rk3366.c @@ -305,7 +305,7 @@ static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = { COMPOSITE_FRACMUX(0, "i2s_8ch_frac", "i2s_8ch_src", CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(28), 0, RK3368_CLKGATE_CON(6), 2, GFLAGS, - &rk3366_i2s_8ch_fracmux), + &rk3366_i2s_8ch_fracmux, 0), COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "i2s_8ch_clkout", mux_i2s_8ch_clkout_p, 0, RK3368_CLKSEL_CON(27), 15, 1, MFLAGS, RK3368_CLKGATE_CON(6), 0, GFLAGS), @@ -318,7 +318,7 @@ static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = { COMPOSITE_FRACMUX(0, "spdif_8ch_frac", "spdif_8ch_src", CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(32), 0, RK3368_CLKGATE_CON(6), 5, GFLAGS, - &rk3366_spdif_8ch_fracmux), + &rk3366_spdif_8ch_fracmux, 0), GATE(SCLK_SPDIF_8CH, "sclk_spdif_8ch", "spdif_8ch_mux", CLK_SET_RATE_PARENT, RK3368_CLKGATE_CON(6), 6, GFLAGS), @@ -328,7 +328,7 @@ static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = { COMPOSITE_FRACMUX(0, "i2s_2ch_frac", "i2s_2ch_src", CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(54), 0, RK3368_CLKGATE_CON(5), 14, GFLAGS, - &rk3366_i2s_2ch_fracmux), + &rk3366_i2s_2ch_fracmux, 0), GATE(SCLK_I2S_2CH, "sclk_i2s_2ch", "i2s_2ch_mux", CLK_SET_RATE_PARENT, RK3368_CLKGATE_CON(5), 15, GFLAGS), @@ -547,7 +547,7 @@ static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = { COMPOSITE_FRACMUX(0, "uart0_frac", "uart0_src", CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(34), 0, RK3368_CLKGATE_CON(2), 1, GFLAGS, - &rk3366_uart0_fracmux), + &rk3366_uart0_fracmux, 0), COMPOSITE_NOMUX(0, "uart3_src", "uart_src", 0, RK3368_CLKSEL_CON(39), 0, 7, DFLAGS, @@ -555,7 +555,7 @@ static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = { COMPOSITE_FRACMUX(0, "uart3_frac", "uart3_src", CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(40), 0, RK3368_CLKGATE_CON(2), 7, GFLAGS, - &rk3366_uart3_fracmux), + &rk3366_uart3_fracmux, 0), /* * Clock-Architecture Diagram 6 |