diff options
| author | Lars-Peter Clausen <lars@metafoo.de> | 2016-10-15 21:17:16 +0200 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2017-12-05 17:12:03 +0800 |
| commit | 528c627ba3d1784fea5df410cd04d22663b0594e (patch) | |
| tree | eb94fdf66c82bac6dd98e3a7ad378fd85892b051 /sound | |
| parent | a47789f1632bf7a55c9852add20390ab82dda7fc (diff) | |
UPSTREAM: ASoC: es8328: Remove some unused defines
The es8328 drivers seems to have used the wm8753 driver as a template. Its
header file contains a few defines that are copied verbatim from the wm8753
header that do not really apply to this driver and are unused. So remove
those defines. This seems safe as they deal with PLL and clock divider
settings and the es8328 driver neither implements a set_pll() nor a
set_clkdiv() callback.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 0f40132)
Change-Id: I1c4c93dd3335678942c19693b0844d9152c7197b
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/es8328.h | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/sound/soc/codecs/es8328.h b/sound/soc/codecs/es8328.h index 37d067bd174b..d16d6e3149b1 100644 --- a/sound/soc/codecs/es8328.h +++ b/sound/soc/codecs/es8328.h @@ -278,43 +278,6 @@ int es8328_probe(struct device *dev, struct regmap *regmap); #define ES8328_REG_MAX 0x35 -#define ES8328_PLL1 0 -#define ES8328_PLL2 1 - -/* clock inputs */ -#define ES8328_MCLK 0 -#define ES8328_PCMCLK 1 - -/* clock divider id's */ -#define ES8328_PCMDIV 0 -#define ES8328_BCLKDIV 1 -#define ES8328_VXCLKDIV 2 - -/* PCM clock dividers */ -#define ES8328_PCM_DIV_1 (0 << 6) -#define ES8328_PCM_DIV_3 (2 << 6) -#define ES8328_PCM_DIV_5_5 (3 << 6) -#define ES8328_PCM_DIV_2 (4 << 6) -#define ES8328_PCM_DIV_4 (5 << 6) -#define ES8328_PCM_DIV_6 (6 << 6) -#define ES8328_PCM_DIV_8 (7 << 6) - -/* BCLK clock dividers */ -#define ES8328_BCLK_DIV_1 (0 << 7) -#define ES8328_BCLK_DIV_2 (1 << 7) -#define ES8328_BCLK_DIV_4 (2 << 7) -#define ES8328_BCLK_DIV_8 (3 << 7) - -/* VXCLK clock dividers */ -#define ES8328_VXCLK_DIV_1 (0 << 6) -#define ES8328_VXCLK_DIV_2 (1 << 6) -#define ES8328_VXCLK_DIV_4 (2 << 6) -#define ES8328_VXCLK_DIV_8 (3 << 6) -#define ES8328_VXCLK_DIV_16 (4 << 6) - -#define ES8328_DAI_HIFI 0 -#define ES8328_DAI_VOICE 1 - #define ES8328_1536FS 1536 #define ES8328_1024FS 1024 #define ES8328_768FS 768 |