diff options
| author | Elaine Zhang <zhangqing@rock-chips.com> | 2019-03-07 14:52:15 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2019-03-08 17:37:05 +0800 |
| commit | 8d550430b65fe25218912aa08bd74f5ca3bee61d (patch) | |
| tree | 90c2275c246c71a399900fd5ce4da7cd37a2253e /include | |
| parent | da355404b3ddfb9be352d62f67a22ad408db4ef4 (diff) | |
clk: rockchip: rk1808: export SCLK_32K_IOE clock id
Add clk_32k_ioe to select 32k io as input or output.
Change-Id: Id1d32b913e9739c4462eab6e565b3fcac370e531
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/rk1808-cru.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h index 3dd5c76d5295..994896d111f1 100644 --- a/include/dt-bindings/clock/rk1808-cru.h +++ b/include/dt-bindings/clock/rk1808-cru.h @@ -111,6 +111,7 @@ #define SCLK_MIPIDSIPHY_REF 110 #define SCLK_PCIEPHY_REF 111 #define SCLK_RTC32K_FRAC 112 +#define SCLK_32K_IOE 113 /* aclk gates */ #define ACLK_GIC_PRE 145 |