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authorwlf <wulf@rock-chips.com>2014-04-23 15:52:32 +0800
committerwlf <wulf@rock-chips.com>2014-04-23 15:52:32 +0800
commitd4cb6899acfe231372e72c2e8b0c4e8f5f9efe15 (patch)
tree3f8cd333d004ca411056b51f940c997669d26986 /drivers/usb/dwc_otg_310/dwc_otg_driver.c
parent93d866ae0c065f5597539c187440482440c3aa53 (diff)
USB: set SIDDQ to place USB PHY into a low power state.
Diffstat (limited to 'drivers/usb/dwc_otg_310/dwc_otg_driver.c')
-rwxr-xr-xdrivers/usb/dwc_otg_310/dwc_otg_driver.c52
1 files changed, 0 insertions, 52 deletions
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index 49026c432d17..b3bf80e76133 100755
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -1576,75 +1576,23 @@ static struct platform_driver dwc_otg_driver = {
void rk_usb_power_up(void)
{
- struct dwc_otg_platform_data *pldata_otg;
- struct dwc_otg_platform_data *pldata_host;
- struct rkehci_platform_data *pldata_ehci;
-
if(cpu_is_rk3288()){
#ifdef CONFIG_RK_USB_UART
/* enable USB bypass UART function */
writel_relaxed(0x00c00000 | usb_to_uart_status, RK_GRF_VIRT + RK3288_GRF_UOC0_CON3);
#endif
- /* unset siddq,the analog blocks are powered up */
-#ifdef CONFIG_USB20_OTG
- if((pldata_otg = &usb20otg_pdata_rk3288)){
- if(pldata_otg->phy_status == USB_PHY_SUSPEND)
- writel_relaxed((0x01<<13)<<16, RK_GRF_VIRT + RK3288_GRF_UOC0_CON0);
- }
-#endif
-#ifdef CONFIG_USB20_HOST
- if((pldata_host = &usb20host_pdata_rk3288)){
- if(pldata_host->phy_status == USB_PHY_SUSPEND)
- writel_relaxed((0x01<<13)<<16, RK_GRF_VIRT + RK3288_GRF_UOC2_CON0);
- }
-#endif
-#ifdef CONFIG_USB_EHCI_RK
- if((pldata_ehci = &rkehci_pdata_rk3288)){
- if(pldata_ehci->phy_status == USB_PHY_SUSPEND)
- writel_relaxed((0x01<<13)<<16, RK_GRF_VIRT + RK3288_GRF_UOC1_CON0);
- }
-#endif
-
}
}
void rk_usb_power_down(void)
{
- struct dwc_otg_platform_data *pldata_otg;
- struct dwc_otg_platform_data *pldata_host;
- struct rkehci_platform_data *pldata_ehci;
-
if(cpu_is_rk3288()){
#ifdef CONFIG_RK_USB_UART
/* disable USB bypass UART function */
usb_to_uart_status = readl_relaxed(RK_GRF_VIRT + RK3288_GRF_UOC0_CON3);
writel_relaxed(0x00c00000, RK_GRF_VIRT + RK3288_GRF_UOC0_CON3);
#endif
- /* set siddq,the analog blocks are powered down
- * note:
- * 1. Before asserting SIDDQ, ensure that VDATSRCENB0,
- * VDATDETENB0, DCDENB0, BYPASSSEL0, ADPPRBENB0,
- * and TESTBURNIN are set to 1'b0.
- * 2. Before asserting SIDDQ, ensure that phy enter suspend.*/
-#ifdef CONFIG_USB20_OTG
- if((pldata_otg = &usb20otg_pdata_rk3288)){
- if(pldata_otg->phy_status == USB_PHY_SUSPEND)
- writel_relaxed((0x01<<13)|((0x01<<13)<<16), RK_GRF_VIRT + RK3288_GRF_UOC0_CON0);
- }
-#endif
-#ifdef CONFIG_USB20_HOST
- if((pldata_host = &usb20host_pdata_rk3288)){
- if(pldata_host->phy_status == USB_PHY_SUSPEND)
- writel_relaxed((0x01<<13)|((0x01<<13)<<16), RK_GRF_VIRT + RK3288_GRF_UOC2_CON0);
- }
-#endif
-#ifdef CONFIG_USB_EHCI_RK
- if((pldata_ehci = &rkehci_pdata_rk3288)){
- if(pldata_ehci->phy_status == USB_PHY_SUSPEND)
- writel_relaxed((0x01<<13)|((0x01<<13)<<16), RK_GRF_VIRT + RK3288_GRF_UOC1_CON0);
- }
-#endif
}
}