diff options
author | jon.lin <jon.lin@rock-chips.com> | 2018-12-19 19:06:17 -0800 |
---|---|---|
committer | Jon Lin <jon.lin@rock-chips.com> | 2018-12-19 22:24:04 -0800 |
commit | a89b7ef06143164af4bd002fcf5659d5b4867416 (patch) | |
tree | 2c819f3032f7bf807f91b309c14f4cace43700c6 /drivers/rkflash | |
parent | 9251396b886e33618ce2242244c5b36c68788654 (diff) |
drivers: rkflash: add new spi nand devices
1.FS35ND01G-S1 FS35ND02G-S2, EM73C044SNC-G, EM73D044SNB-G
Change-Id: If362a0a0cd7789b027c8b7d2ca176ba95ddea8b4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Diffstat (limited to 'drivers/rkflash')
-rw-r--r-- | drivers/rkflash/sfc_nand.c | 35 |
1 files changed, 22 insertions, 13 deletions
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c index 2a3a95f5fb2f..24b3bdc41fd3 100644 --- a/drivers/rkflash/sfc_nand.c +++ b/drivers/rkflash/sfc_nand.c @@ -15,15 +15,13 @@ static struct nand_info spi_nand_tbl[] = { /* TC58CVG0S0HxAIx */ - {0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8, NULL}, + {0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xFF, 0xFF, 4, 8, NULL}, /* TC58CVG1S0HxAIx */ - {0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8, NULL}, + {0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xFF, 0xFF, 4, 8, NULL}, /* MX35LF1GE4AB */ {0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1}, /* MX35LF2GE4AB */ {0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1}, - /* MX66L1G45G */ - {0x90AF, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1}, /* GD5F1GQ4UAYIG */ {0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL}, /* MT29F1G01ZAC */ @@ -33,11 +31,9 @@ static struct nand_info spi_nand_tbl[] = { /* GD5F1GQ4U */ {0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3}, /* IS37SML01G1 */ - {0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1}, + {0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, 8, 12, &sfc_nand_ecc_status_sp1}, /* W25N01GV */ - {0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1}, - /* HYF2GQ4UAACAE */ - {0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL}, + {0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 4, 20, &sfc_nand_ecc_status_sp1}, /* HYF2GQ4UAACAE */ {0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL}, /* HYF2GQ4UDACAE */ @@ -47,15 +43,23 @@ static struct nand_info spi_nand_tbl[] = { /* HYF1GQ4UDACAE */ {0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, NULL}, /* F50L1G41LB */ - {0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, NULL}, + {0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, &sfc_nand_ecc_status_sp1}, /* XT26G02A */ - {0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4}, + {0x0BE2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4}, /* XT26G01A */ - {0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4}, + {0x0BE1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4}, /* FS35ND01G-S1 */ {0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 16, 20, &sfc_nand_ecc_status_sp5}, /* FS35ND02G-S2 */ {0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, 16, 20, &sfc_nand_ecc_status_sp5}, + /* DS35Q1GA-1B */ + {0xE571, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1}, + /* DS35Q2GA-1B */ + {0xE572, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1}, + /* EM73C044SNC-G */ + {0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, 4, 20, NULL}, + /* EM73D044SNB-G */ + {0xD520, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL} }; static u8 id_byte[8]; @@ -374,6 +378,7 @@ static u32 sfc_nand_erase_block(u8 cs, u32 addr) static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) { int ret; + u32 plane; union SFCCMD_DATA sfcmd; union SFCCTRL_DATA sfctrl; u8 status; @@ -382,6 +387,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) u32 spare_offs_2 = p_nand_info->spare_offs_2; memcpy(gp_page_buf, p_data, data_sz); + ftl_memset(&gp_page_buf[data_sz / 4], 0xff, 64); gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0]; gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1]; @@ -400,7 +406,8 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) sfctrl.d32 = 0; sfctrl.b.datalines = sfc_nand_dev.prog_lines; sfctrl.b.addrbits = 16; - sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf); + plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0; + sfc_request(sfcmd.d32, sfctrl.d32, plane, gp_page_buf); sfcmd.d32 = 0; sfcmd.b.cmd = p_nand_info->page_prog_cmd; @@ -419,6 +426,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) { int ret; + u32 plane; union SFCCMD_DATA sfcmd; union SFCCTRL_DATA sfctrl; u32 ecc_result; @@ -449,8 +457,9 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) sfctrl.d32 = 0; sfctrl.b.datalines = sfc_nand_dev.read_lines; + plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0; memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE); - ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf); + ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, gp_page_buf); memcpy(p_data, gp_page_buf, data_sz); p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4]; |