diff options
| author | Zheng Yang <zhengyang@rock-chips.com> | 2018-05-18 16:09:50 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-05-18 17:53:53 +0800 |
| commit | bb9bdab32f84cb31fa17d6cf779b0b61128d5cae (patch) | |
| tree | 809a87aa269ae6ff503f22352ee4d54df6e94b31 /drivers/phy | |
| parent | 1df09ca4e1c2cfa235e87a0c879bb5a5a1c80d3b (diff) | |
phy/rockchip: inno-hdmi: round rk3328 recalc frac rate by 1000Hz
For pixel clock is rounded by 1000Hz, the recalcated clock rate
of fractional frame rate mode, such 59.94/29.97/23.97Hz, is need
to take the 1000Hz rounding. Otherwise it will not find the pre-pll
settings when powering up phy.
Change-Id: I0f02bbede9314d57d97c539cd995eb0f67295cfd
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c index d17c7a143d9c..251b5016b06a 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c @@ -1046,11 +1046,12 @@ inno_hdmi_rk3328_phy_pll_recalc_rate(struct inno_hdmi_phy *inno, do_div(vco, nd * no_a * no_d * 2); } - inno->pixclock = vco; + frac = vco; + inno->pixclock = DIV_ROUND_CLOSEST(frac, 1000) * 1000; dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock); - return inno->pixclock; + return frac; } static unsigned long |