diff options
author | Wyon Bi <bivvy.bi@rock-chips.com> | 2018-03-26 16:57:14 +0800 |
---|---|---|
committer | Tao Huang <huangtao@rock-chips.com> | 2018-04-03 12:33:46 +0800 |
commit | 868a2dedf07484cc681c6559b0f2b8f918b3cd8e (patch) | |
tree | a31de7b5d01d385e412757f2a43582e4ac747010 /drivers/clk | |
parent | 158d412110dbbd1dd102cab95f9314ab0be2059d (diff) |
clk: rockchip: px30: Fix i2s out mclk
Fixes: f6128506aaa9 ("clk: rockchip: px30: Fix i2s out mclk")
Change-Id: I90dd4d1cdb1f3a2e9009dcb574115a5e7504fc32
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/rockchip/clk-px30.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c index 198737f29632..c3a0eaf57ebf 100644 --- a/drivers/clk/rockchip/clk-px30.c +++ b/drivers/clk/rockchip/clk-px30.c @@ -609,7 +609,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = { &px30_i2s1_fracmux, PX30_I2S_FRAC_MAX_PRATE), GATE(SCLK_I2S1, "clk_i2s1", "clk_i2s1_mux", CLK_SET_RATE_PARENT, PX30_CLKGATE_CON(10), 2, GFLAGS), - COMPOSITE_NODIV(SCLK_I2S1_OUT, "clk_i2s1_out_pre", mux_i2s1_out_p, 0, + COMPOSITE_NODIV(0, "clk_i2s1_out_pre", mux_i2s1_out_p, 0, PX30_CLKSEL_CON(30), 15, 1, MFLAGS, PX30_CLKGATE_CON(10), 3, GFLAGS), GATE(SCLK_I2S1_OUT, "clk_i2s1_out", "clk_i2s1_out_pre", CLK_SET_RATE_PARENT, |