diff options
| author | Tang Yun ping <typ@rock-chips.com> | 2017-05-04 20:49:58 +0800 |
|---|---|---|
| committer | Tang Yun ping <typ@rock-chips.com> | 2017-05-10 16:17:22 +0800 |
| commit | 764e893ee82321938fc6f4349e9e7caf06a04410 (patch) | |
| tree | a559d2c0a88ad9dd5e9a1b99dcebc2d7f0f3de07 /drivers/clk/rockchip/clk.h | |
| parent | 40204ab0fd0f397434a0387efe089abcbd9743f9 (diff) | |
clk: rockchip: support setting ddr clock via SIP Version 2 APIs
1. Add support setting ddr clock via SIP Version 2 APIs
2. RK3288 using SIP Vision 2.
Change-Id: I935e43b1885a96650dc86e3eb6d79de6795062a9
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Diffstat (limited to 'drivers/clk/rockchip/clk.h')
| -rw-r--r-- | drivers/clk/rockchip/clk.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index a0f8ccb54b50..d76c9e9e07a4 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -313,6 +313,7 @@ struct clk *rockchip_clk_register_mmc(const char *name, */ #define ROCKCHIP_DDRCLK_SIP 0x01 #define ROCKCHIP_DDRCLK_SCPI 0x02 +#define ROCKCHIP_DDRCLK_SIP_V2 0x03 struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, const char *const *parent_names, |