diff options
| author | Elaine Zhang <zhangqing@rock-chips.com> | 2017-09-20 10:22:59 +0800 |
|---|---|---|
| committer | Elaine Zhang <zhangqing@rock-chips.com> | 2017-09-20 10:29:37 +0800 |
| commit | 88a5404a227753592628f51b7db70b68e2fde2a6 (patch) | |
| tree | 1ec0dbdf72574ed40f33dd321fb0baa4fe52553a /drivers/clk/rockchip/clk.c | |
| parent | a8cf408589711612dd69cda6d3effb086830df8f (diff) | |
clk: rockchip: fix up the rockchip_fractional_approximation
If frac clk parent rate is PLL rate, but still lower
than frac rate*20, not allowed fractional div.
Change-Id: I09c93e1d8f32c0a4e345057964d58505b1477204
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Diffstat (limited to 'drivers/clk/rockchip/clk.c')
| -rw-r--r-- | drivers/clk/rockchip/clk.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index 4c3f55dcd829..7cb2f3e09269 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -181,6 +181,11 @@ void rockchip_fractional_approximation(struct clk_hw *hw, p_parent = clk_hw_get_parent(clk_hw_get_parent(hw)); p_parent_rate = clk_hw_get_rate(p_parent); *parent_rate = p_parent_rate; + if (*parent_rate < rate * 20) { + pr_err("%s parent_rate(%ld) is low than rate(%ld)*20, fractional div is not allowed\n", + clk_hw_get_name(hw), *parent_rate, rate); + return; + } } /* |