diff options
| author | Finley Xiao <finley.xiao@rock-chips.com> | 2018-05-09 16:54:43 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-05-11 09:20:28 +0800 |
| commit | ee63aafed569caaf457410bca3870258fd645452 (patch) | |
| tree | b7472d197d490b8bb2f8b98cb897d54e65975406 /drivers/clk/rockchip/clk-rk3308.c | |
| parent | 2e21f345c388547f35bb20fd6c762654fe500cb9 (diff) | |
clk: rockchip: rk3308: Change apll to boost pll
Change-Id: I34d445e65181e09a3069b48059ef7283f01c194f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Diffstat (limited to 'drivers/clk/rockchip/clk-rk3308.c')
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3308.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3308.c b/drivers/clk/rockchip/clk-rk3308.c index cc762bf06a0d..7965e84cb5d5 100644 --- a/drivers/clk/rockchip/clk-rk3308.c +++ b/drivers/clk/rockchip/clk-rk3308.c @@ -129,6 +129,7 @@ static const struct rockchip_cpuclk_reg_data rk3308_cpuclk_data = { .mux_core_main = 0, .mux_core_shift = 6, .mux_core_mask = 0x3, + .pll_name = "pll_apll", }; PNAME(mux_pll_p) = { "xin24m" }; @@ -189,7 +190,7 @@ PNAME(mux_spdif_rx_src_p) = { "clk_spdif_rx_div", "clk_spdif_rx_div50" }; PNAME(mux_spdif_rx_p) = { "clk_spdif_rx_src", "clk_spdif_rx_frac" }; static struct rockchip_pll_clock rk3308_pll_clks[] __initdata = { - [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, + [apll] = PLL_BOOST(pll_rk3328, PLL_APLL, "apll", mux_pll_p, 0, RK3308_PLL_CON(0), RK3308_MODE_CON, 0, 0, 0, rk3308_pll_rates), [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, |