diff options
| author | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2015-01-15 03:06:22 +0100 |
|---|---|---|
| committer | Zefan Li <lizefan@huawei.com> | 2015-06-19 11:40:12 +0800 |
| commit | 16d67beba92a80d8c766834ea01cdd040d9ff6df (patch) | |
| tree | 0cbb4402497178bbfff9a9e74d1b86df2f808cae /arch | |
| parent | d2848d647b5ac1be9dfd46c634bcd667ea76ed7e (diff) | |
ARM: 8284/1: sa1100: clear RCSR_SMR on resume
commit e461894dc2ce7778ccde1c3483c9b15a85a7fc5f upstream.
StrongARM core uses RCSR SMR bit to tell to bootloader that it was reset
by entering the sleep mode. After we have resumed, there is little point
in having that bit enabled. Moreover, if this bit is set before reboot,
the bootloader can become confused. Thus clear the SMR bit on resume
just before clearing the scratchpad (resume address) register.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Zefan Li <lizefan@huawei.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-sa1100/pm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c index 2fa499ec6afe..69bbe4e55aa0 100644 --- a/arch/arm/mach-sa1100/pm.c +++ b/arch/arm/mach-sa1100/pm.c @@ -80,6 +80,7 @@ static int sa11x0_pm_enter(suspend_state_t state) /* * Ensure not to come back here if it wasn't intended */ + RCSR = RCSR_SMR; PSPR = 0; /* |