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authorBjorn Helgaas <bhelgaas@google.com>2016-02-26 09:15:11 -0600
committerBen Hutchings <ben@decadent.org.uk>2016-05-01 00:05:16 +0200
commitac8f5acfbcdec0475361790281405936b511d345 (patch)
treec813d53afa6ff5d7e12a8ef827ec53dd9d96fdc5 /arch
parente8238ed21c14dcd0979e1b35850ee65062221b5f (diff)
x86/PCI: Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs
commit b894157145e4ac7598d7062bc93320898a5e059e upstream. The Home Agent and PCU PCI devices in Broadwell-EP have a non-BAR register where a BAR should be. We don't know what the side effects of sizing the "BAR" would be, and we don't know what address space the "BAR" might appear to describe. Mark these devices as having non-compliant BARs so the PCI core doesn't touch them. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/pci/fixup.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index 0951b81ea90e..7d0cfe38dc60 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -538,3 +538,10 @@ static void __devinit twinhead_reserve_killing_zone(struct pci_dev *dev)
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
+
+static void pci_bdwep_bar(struct pci_dev *dev)
+{
+ dev->non_compliant_bars = 1;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_bdwep_bar);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_bdwep_bar);