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authorShunqian Zheng <zhengsq@rock-chips.com>2019-01-04 18:17:21 +0800
committerTao Huang <huangtao@rock-chips.com>2019-01-23 11:27:48 +0800
commit2847572fdbdbe8411a89b055739adc7a90b5c01f (patch)
treea120aade9b778bed6a21d31eaa6cf785e0f101e7 /arch
parent0842ad011a12da3db896cd07e73304e694b19952 (diff)
arm64: dts: rockchip: add robot dtsi for px30 & rk3326
With minimal interfaces, the robot dts can with or without gpu enabled, running in bad thermal environment. Change-Id: Ia7f65941d932e88c33ef33f0d7877efa6a444852 Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-robot-no-gpu.dtsi57
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-robot.dtsi89
2 files changed, 146 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-robot-no-gpu.dtsi b/arch/arm64/boot/dts/rockchip/px30-robot-no-gpu.dtsi
new file mode 100644
index 000000000000..e3f4274b2309
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-robot-no-gpu.dtsi
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include "px30-robot.dtsi"
+
+/ {
+ compatible = "rockchip,linux", "rockchip,px30-robot-no-gpu";
+
+ /* Remove gpu thermal and gpu cooling map */
+ /delete-node/ thermal-zones;
+
+ thermal_zones: thermal-zones {
+ soc_thermal: soc-thermal {
+ polling-delay-passive = <20>;
+ polling-delay = <1000>;
+ sustainable-power = <252>;
+
+ thermal-sensors = <&tsadc 0>;
+ trips {
+ threshold: trip-point-0 {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ target: trip-point-1 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ soc_crit: soc-crit {
+ temperature = <115000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <100>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+
+ thermal-sensors = <&tsadc 1>;
+ };
+ };
+};
+
+&gpu {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/rockchip/px30-robot.dtsi b/arch/arm64/boot/dts/rockchip/px30-robot.dtsi
new file mode 100644
index 000000000000..d3500b92fdf1
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-robot.dtsi
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include "px30.dtsi"
+
+/ {
+ compatible = "rockchip,linux", "rockchip,px30-robot";
+
+ chosen {
+ bootargs = "swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootwait";
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <2>;
+ rockchip,wake-irq = <0>;
+ /* If enable uart uses irq instead of fiq */
+ rockchip,irq-mode-enable = <0>;
+ rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x0 0x20000>;
+ console-size = <0x0 0x80000>;
+ ftrace-size = <0x0 0x00000>;
+ pmsg-size = <0x0 0x00000>;
+ memory-region = <&ramoops_mem>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops_mem: ramoops@00000000 {
+ reg = <0x0 0x8000000 0x0 0xa0000>;
+ };
+ };
+};
+
+&cpu0_opp_table {
+ /delete-node/ opp-1248000000;
+ /delete-node/ opp-1296000000;
+ /delete-node/ opp-1416000000;
+ /delete-node/ opp-1512000000;
+};
+
+&dmc_opp_table {
+ /delete-node/ opp-666000000;
+ /delete-node/ opp-768000000;
+};
+
+&soc_thermal {
+ trips {
+ threshold: trip-point-0 {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ target: trip-point-1 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ soc_crit: soc-crit {
+ temperature = <115000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+};
+
+&tsadc {
+ pinctrl-names = "gpio", "otpout";
+ pinctrl-0 = <&tsadc_otp_gpio>;
+ pinctrl-1 = <&tsadc_otp_out>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "disabled";
+};