diff options
author | Sugar Zhang <sugar.zhang@rock-chips.com> | 2017-09-20 09:14:18 +0800 |
---|---|---|
committer | Huang, Tao <huangtao@rock-chips.com> | 2017-09-22 15:03:03 +0800 |
commit | 721e28dd911ed6caacc87330d7b1b10eff674d6c (patch) | |
tree | e9d07920329883e7c7d0e14593830ae1772bb9b7 /arch/arm64/boot | |
parent | 281a69cea94c19094bc33278e9f4f1a0806c58ce (diff) |
arm64: dts: rockchip: split i2s mclk pinctrl from i2s bus
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.
Change-Id: I55db6e9a0181cae0cb414b9dcacae7ff0214b50c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot')
14 files changed, 28 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-p9.dts b/arch/arm64/boot/dts/rockchip/rk3368-p9.dts index 3f6c65dbe777..df62277bc6c1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-p9.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-p9.dts @@ -575,6 +575,8 @@ clock-names = "mclk"; spk-con-gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; hp-det-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-sheep-lvds.dts b/arch/arm64/boot/dts/rockchip/rk3368-sheep-lvds.dts index 81b47b804ba4..82ef29b8d03f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-sheep-lvds.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-sheep-lvds.dts @@ -509,6 +509,8 @@ #sound-dai-cells = <0>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; realtek,in1-differential; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts b/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts index 17280d65a465..f227d375dd5b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts @@ -521,6 +521,8 @@ #sound-dai-cells = <0>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; realtek,in1-differential; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-xikp.dts b/arch/arm64/boot/dts/rockchip/rk3368-xikp.dts index eaab1cbd2070..139380eb558f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-xikp.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-xikp.dts @@ -590,6 +590,8 @@ clock-names = "mclk"; spk-con-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>; hp-det-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi index 6c22a9705af3..178e3378edbe 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi @@ -343,6 +343,8 @@ reg = <0x10>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi index 62f36d293928..c7446fc00e9f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi @@ -145,6 +145,8 @@ reg = <0x1a>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts index eebe7a7b4bef..bc4856d79e03 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts @@ -731,7 +731,7 @@ clock-names = "mclk"; realtek,in1-differential; pinctrl-names = "default"; - pinctrl-0 = <&rt5640_hpcon>; + pinctrl-0 = <&rt5640_hpcon &i2s_8ch_mclk>; hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; io-channels = <&saradc 4>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts index 740a5fbf7f2c..2011e5420f86 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts @@ -657,7 +657,7 @@ clock-names = "mclk"; realtek,in1-differential; pinctrl-names = "default"; - pinctrl-0 = <&rt5640_hpcon>; + pinctrl-0 = <&rt5640_hpcon &i2s_8ch_mclk>; hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; io-channels = <&saradc 4>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi index b7cadfee5d11..41ae17e5ea47 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -590,7 +590,7 @@ ap_i2c_audio: &i2c8 { reg = <0x1a>; pinctrl-names = "default"; - pinctrl-0 = <&headset_int_l>; + pinctrl-0 = <&headset_int_l &i2s_8ch_mclk>; interrupt-parent = <&gpio1>; interrupts = <23 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android-6.0.dts b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android-6.0.dts index 6ed06edbf0ea..934cb90ff906 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android-6.0.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android-6.0.dts @@ -634,6 +634,8 @@ reg = <0x11>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts index 437f28f3243b..6c5a2cbb47af 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts @@ -644,6 +644,8 @@ reg = <0x11>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts b/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts index 0c74b5b902d0..ebbaae38bf73 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts @@ -706,6 +706,8 @@ reg = <0x33>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts index aa8a881e51c3..0a3e7985e27c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts @@ -625,6 +625,8 @@ reg = <0x10>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>; spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 56ea0fc5c954..d3f0f76344b6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2342,8 +2342,11 @@ <3 28 RK_FUNC_1 &pcfg_pull_none>, <3 29 RK_FUNC_1 &pcfg_pull_none>, <3 30 RK_FUNC_1 &pcfg_pull_none>, - <3 31 RK_FUNC_1 &pcfg_pull_none>, - <4 0 RK_FUNC_1 &pcfg_pull_none>; + <3 31 RK_FUNC_1 &pcfg_pull_none>; + }; + + i2s_8ch_mclk: i2s-8ch-mclk { + rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>; }; }; |