arm64: dts: rockchip: add rk3399pro npu evb board file

Change-Id: I3db38258c857c8a263bc89bea0d5cbb871227d96
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

3 files changed, 163 insertions, 20 deletions

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 46c08def97c7..024e3b656108 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -82,6 +82,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-tve1205g.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-videostrong-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vr-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-npu-evb-v10.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-npu-evb-v10.dts b/arch/arm64/boot/dts/rockchip/rk3399pro-npu-evb-v10.dts
new file mode 100644
index 000000000000..b2e2f12a3006
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-npu-evb-v10.dts
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3399pro-npu.dtsi"
+
+/ {
+	model = "Rockchip RK3399pro-npu EVB V10 Board";
+	compatible = "rockchip,rk3399pro-npu-evb-v10", "rockchip,rk3399pro-npu";
+
+	chosen {
+		bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 init=/init swiotlb=1 kpti=0";
+	};
+
+	keys: gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key>;
+
+		power {
+			gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
+			label = "GPIO Power";
+			linux,code = <116>;
+			wakeup-source;
+		};
+	};
+
+	fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		rockchip,serial-id = <2>;
+		rockchip,wake-irq = <0>;
+		/* If enable uart uses irq instead of fiq */
+		rockchip,irq-mode-enable = <0>;
+		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
+		interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "okay";
+	};
+
+	vdd_cpu: vdd-cpu {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_cpu";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1000000>;
+	};
+
+	vcc_1v8: vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
+	vcc_3v3: vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_3v3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&i2c1 {
+	status = "okay";
+
+	vdd_npu: syr837@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		vin-supply = <&vcc5v0_sys>;
+		regulator-compatible = "fan53555-reg";
+		pinctrl-0 = <&vsel_gpio>;
+		vsel-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vdd_npu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <850000>;
+		regulator-ramp-delay = <1000>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-boot-on;
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio0-supply = <&vcc_1v8>;
+	vccio2-supply = <&vcc_1v8>;
+	vccio5-supply = <&vcc_1v8>;
+	vccio6-supply = <&vcc_3v3>;
+};
+
+&pmu_io_domains {
+	status = "okay";
+
+	pmuio1-supply = <&vcc_1v8>;
+	pmuio2-supply = <&vcc_1v8>;
+};
+
+&pinctrl {
+	vsel_gpio: vsel-gpio {
+		rockchip,pins =
+			<0 RK_PC6 0 &pcfg_pull_down>;
+	};
+
+	pwr_key: pwr-key {
+		rockchip,pins =
+			<0 RK_PB0 0 &pcfg_pull_none>;
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi
index 8da548ae6954..65bed2aad3f8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi
@@ -15,7 +15,7 @@
 	#size-cells = <2>;
 
 	aliases {
-		i2c0 = &i2c0;
+		i2c1 = &i2c1;
 		serial2 = &uart2;
 	};
 
@@ -317,19 +317,6 @@
 		};
 	};
 
-	i2c0: i2c@ff410000 {
-		compatible = "rockchip,rk3399-i2c";
-		reg = <0x0 0xff410000 0x0 0x1000>;
-		clocks =  <&cru SCLK_PMU_I2C0>, <&cru PCLK_I2C0_PMU>;
-		clock-names = "i2c", "pclk";
-		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&i2c0_xfer>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
 	dmac: dmac@ff4e0000 {
 		compatible = "arm,pl330", "arm,primecell";
 		reg = <0x0 0xff4e0000 0x0 0x4000>;
@@ -340,6 +327,19 @@
 		peripherals-req-type-burst;
 	};
 
+	i2c1: i2c@ff500000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff500000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	uart2: serial@ff550000 {
 		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff550000 0x0 0x100>;
@@ -440,6 +440,10 @@
 			#interrupt-cells = <2>;
 		};
 
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
 		pcfg_pull_none: pcfg-pull-none {
 			bias-disable;
 		};
@@ -449,13 +453,13 @@
 			input-schmitt-enable;
 		};
 
-		i2c0 {
-			i2c0_xfer: i2c0-xfer {
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
 				rockchip,pins =
-					/* i2c0_sda */
-					<0 RK_PB1 1 &pcfg_pull_none_smt>,
-					/* i2c0_scl */
-					<0 RK_PB0 1 &pcfg_pull_none_smt>;
+					/* i2c1_sda */
+					<0 RK_PC1 1 &pcfg_pull_none_smt>,
+					/* i2c1_scl */
+					<0 RK_PC0 1 &pcfg_pull_none_smt>;
 			};
 		};