diff options
| author | Wyon Bi <bivvy.bi@rock-chips.com> | 2018-12-08 11:38:52 +0800 |
|---|---|---|
| committer | Wyon Bi <bivvy.bi@rock-chips.com> | 2018-12-29 16:41:15 +0800 |
| commit | 1521458687e4edcfd844bce9ef8c62ab0d165fa8 (patch) | |
| tree | 92ab5b796f90536486e45e75919487e2420cad34 /arch/arm64/boot/dts | |
| parent | f792a2f71804e540af81e07db6de9a5144613e34 (diff) | |
arm64: dts: rockchip: Update and clean up display nodes for px30/rk3326 boards
Change-Id: I4f51bb63ec0f6027a1019f49f0ac1a197ecf7e9e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts')
18 files changed, 149 insertions, 869 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts index b1ef2f99d41f..20b9544ace43 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts @@ -822,10 +822,6 @@ }; }; -&mipi_dphy { - status = "okay"; -}; - &dsi_in_vopl { status = "disabled"; }; @@ -840,9 +836,6 @@ }; &rgb { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&lcdc_rgb_pins>; - pinctrl-1 = <&lcdc_sleep_pins>; status = "okay"; ports { @@ -870,72 +863,6 @@ }; &pinctrl { - lcdc { - lcdc_rgb_pins: lcdc-rgb-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ - }; - - lcdc_sleep_pins: lcdc-sleep-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ - }; - }; - pmic { pmic_int: pmic_int { rockchip,pins = diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts index e9c8205cc2fe..b325a6be8575 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts @@ -911,10 +911,6 @@ }; }; -&mipi_dphy { - status = "okay"; -}; - &dsi_in_vopl { status = "disabled"; }; @@ -929,9 +925,6 @@ }; &rgb { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&lcdc_rgb_pins>; - pinctrl-1 = <&lcdc_sleep_pins>; status = "okay"; ports { @@ -959,72 +952,6 @@ }; &pinctrl { - lcdc { - lcdc_rgb_pins: lcdc-rgb-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ - }; - - lcdc_sleep_pins: lcdc-sleep-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ - }; - }; - pmic { pmic_int: pmic_int { rockchip,pins = diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts index 1333012f0642..2df2495cc4e4 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts @@ -778,10 +778,6 @@ }; }; -&mipi_dphy { - status = "okay"; -}; - &dsi_in_vopl { status = "disabled"; }; @@ -796,9 +792,6 @@ }; &rgb { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&lcdc_rgb_pins>; - pinctrl-1 = <&lcdc_sleep_pins>; status = "okay"; ports { @@ -826,72 +819,6 @@ }; &pinctrl { - lcdc { - lcdc_rgb_pins: lcdc-rgb-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ - }; - - lcdc_sleep_pins: lcdc-sleep-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ - }; - }; - pmic { pmic_int: pmic_int { rockchip,pins = diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts index 195b51d4b2e0..0caaeac9e7b7 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts @@ -821,10 +821,6 @@ }; }; -&mipi_dphy { - status = "okay"; -}; - &dsi_in_vopl { status = "disabled"; }; @@ -839,9 +835,6 @@ }; &rgb { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&lcdc_rgb_pins>; - pinctrl-1 = <&lcdc_sleep_pins>; status = "okay"; ports { @@ -869,72 +862,6 @@ }; &pinctrl { - lcdc { - lcdc_rgb_pins: lcdc-rgb-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ - }; - - lcdc_sleep_pins: lcdc-sleep-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ - }; - }; - pmic { pmic_int: pmic_int { rockchip,pins = diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts index 5392c8406e88..0317576a43df 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts @@ -509,11 +509,16 @@ }; }; +&lvds_in_vopb { + status = "okay"; +}; + &lvds_in_vopl { status = "disabled"; }; &route_lvds { + connect = <&vopb_out_lvds>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts index 443ec43baf35..14a5e7859a1e 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts @@ -282,6 +282,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &bus_apll { bus-supply = <&vdd_logic>; status = "okay"; @@ -291,10 +304,6 @@ cpu-supply = <&vdd_arm>; }; -&dsi_in_vopl { - status = "disabled"; -}; - &dfi { status = "okay"; }; @@ -675,10 +684,6 @@ status = "okay"; }; -&mipi_dphy { - status = "okay"; -}; - &mipi_dphy_rx0 { status = "okay"; @@ -749,10 +754,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts index d2025607c57f..9281dd25e2b1 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts @@ -283,6 +283,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &bus_apll { bus-supply = <&vdd_logic>; status = "okay"; @@ -292,10 +305,6 @@ cpu-supply = <&vdd_arm>; }; -&dsi_in_vopl { - status = "disabled"; -}; - &dfi { status = "okay"; }; @@ -676,10 +685,6 @@ status = "disabled"; }; -&mipi_dphy { - status = "okay"; -}; - &mipi_dphy_rx0 { status = "disabled"; @@ -786,10 +791,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts index 8f791dac494a..a5c8a3e53ea1 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts @@ -274,6 +274,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &bus_apll { bus-supply = <&vdd_logic>; status = "okay"; @@ -283,10 +296,6 @@ cpu-supply = <&vdd_arm>; }; -&dsi_in_vopl { - status = "disabled"; -}; - &emmc { bus-width = <8>; cap-mmc-highspeed; @@ -630,10 +639,6 @@ #sound-dai-cells = <0>; }; -&mipi_dphy { - status = "okay"; -}; - &nandc0 { status = "okay"; }; @@ -694,10 +699,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dts index b3f08bb2a768..dc0a6c7bbf18 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dts @@ -737,10 +737,6 @@ status = "disabled"; }; -&mipi_dphy { - status = "okay"; -}; - &mipi_dphy_rx0 { status = "disabled"; @@ -778,9 +774,6 @@ }; &rgb { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&lcdc_rgb_pins>; - pinctrl-1 = <&lcdc_sleep_pins>; status = "okay"; ports { @@ -814,72 +807,6 @@ }; }; - lcdc { - lcdc_rgb_pins: lcdc-rgb-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ - }; - - lcdc_sleep_pins: lcdc-sleep-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ - }; - }; - pmic { pmic_int: pmic_int { rockchip,pins = diff --git a/arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts b/arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts index 28a85e8dcdb1..b5c129531c0a 100644 --- a/arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts +++ b/arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts @@ -197,10 +197,6 @@ }; }; -&mipi_dphy { - status = "okay"; -}; - &dsi_in_vopb { status = "okay"; }; @@ -743,9 +739,6 @@ }; &rgb { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&lcdc_rgb_pins>; - pinctrl-1 = <&lcdc_sleep_pins>; status = "okay"; ports { @@ -773,72 +766,6 @@ }; &pinctrl { - lcdc { - lcdc_rgb_pins: lcdc-rgb-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ - }; - - lcdc_sleep_pins: lcdc-sleep-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ - <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ - <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ - <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ - <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ - <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ - <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ - }; - }; - pmic { pmic_int: pmic_int { rockchip,pins = diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi index 9a3a5f723c14..62c369676240 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi @@ -217,6 +217,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &bus_apll { bus-supply = <&vdd_logic>; status = "okay"; @@ -248,10 +261,6 @@ >; }; -&dsi_in_vopl { - status = "disabled"; -}; - &dfi { status = "okay"; }; @@ -629,10 +638,6 @@ vccio5-supply = <&vcc_3v0>; }; -&mipi_dphy { - status = "okay"; -}; - &nandc0 { status = "okay"; }; @@ -693,10 +698,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts index 238ac22534d9..24eeb20dd50e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts @@ -90,8 +90,6 @@ enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; - rockchip,data-width = <18>; - rockchip,output = "rgb"; display-timings { native-mode = <&timing0>; @@ -114,8 +112,8 @@ }; port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; + panel_in_rgb: endpoint { + remote-endpoint = <&rgb_out_panel>; }; }; }; @@ -597,17 +595,15 @@ vccio5-supply = <&vcc_3v0>; }; -&lvds { - pinctrl-names = "default"; - pinctrl-0 = <&lcdc_rgb_dclk_pin &lcdc_rgb666_m1_data_pins>; +&rgb { status = "okay"; ports { port@1 { reg = <1>; - lvds_out_panel: endpoint { - remote-endpoint = <&panel_in_lvds>; + rgb_out_panel: endpoint { + remote-endpoint = <&panel_in_rgb>; }; }; }; @@ -625,8 +621,36 @@ }; lcdc { - lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin { - rockchip,pins = <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>; + lcdc_m1_rgb_pins: lcdc-m1-rgb-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>, /* LCDC_DCLK */ + <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D0 */ + <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ + <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ + <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ + <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ + <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ + <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ + <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ + <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ + <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ + <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D17 */ + }; + + lcdc_m1_sleep_pins: lcdc-m1-sleep-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */ + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D17 */ }; }; @@ -679,7 +703,8 @@ rockchip,sleep-debug-en = <1>; }; -&route_lvds { +&route_rgb { + connect = <&vopb_out_rgb>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts index 96efc3124e2d..31d359fcc4a8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts @@ -95,48 +95,6 @@ default-brightness-level = <200>; }; - panel { - compatible = "samsung,lsl070nl01", "simple-panel"; - backlight = <&backlight>; - enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - enable-delay-ms = <20>; - prepare-delay-ms = <20>; - unprepare-delay-ms = <20>; - disable-delay-ms = <20>; - width-mm = <217>; - height-mm = <136>; - rockchip,data-mapping = "vesa"; - rockchip,data-width = <24>; - rockchip,output = "lvds"; - status = "disabled"; - - display-timings { - native-mode = <&timing0>; - - timing0: timing0 { - clock-frequency = <49500000>; - hactive = <1024>; - vactive = <600>; - hback-porch = <90>; - hfront-porch = <90>; - vback-porch = <10>; - vfront-porch = <10>; - hsync-len = <90>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; - }; - }; - }; - rk809-sound { compatible = "simple-audio-card"; simple-audio-card,name = "rockchip,rk809-codec"; @@ -338,9 +296,9 @@ ]; display-timings { - native-mode = <&st7703_timing>; + native-mode = <&timing0>; - st7703_timing: timing0 { + timing0: timing0 { clock-frequency = <66000000>; hactive = <720>; vactive = <1280>; @@ -359,10 +317,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + &dsi_in_vopl { status = "disabled"; }; +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &emmc { bus-width = <8>; cap-mmc-highspeed; @@ -1059,28 +1026,6 @@ status = "okay"; }; -&lvds { - status = "disabled"; - - ports { - port@1 { - reg = <1>; - - lvds_out_panel: endpoint { - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - -&lvds_in_vopl { - status = "disabled"; -}; - -&mipi_dphy { - status = "okay"; -}; - &nandc0 { status = "okay"; }; @@ -1157,14 +1102,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - -&route_lvds { - status = "disabled"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts index f38e3550d336..6c306c3aa4bd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts @@ -95,48 +95,6 @@ default-brightness-level = <200>; }; - panel { - compatible = "samsung,lsl070nl01", "simple-panel"; - backlight = <&backlight>; - enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - enable-delay-ms = <20>; - prepare-delay-ms = <20>; - unprepare-delay-ms = <20>; - disable-delay-ms = <20>; - width-mm = <217>; - height-mm = <136>; - rockchip,data-mapping = "vesa"; - rockchip,data-width = <24>; - rockchip,output = "lvds"; - status = "disabled"; - - display-timings { - native-mode = <&timing0>; - - timing0: timing0 { - clock-frequency = <49500000>; - hactive = <1024>; - vactive = <600>; - hback-porch = <90>; - hfront-porch = <90>; - vback-porch = <10>; - vfront-porch = <10>; - hsync-len = <90>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; - }; - }; - }; - multi_dais: multi-dais { status = "okay"; compatible = "rockchip,multi-dais"; @@ -348,9 +306,9 @@ ]; display-timings { - native-mode = <&st7703_timing>; + native-mode = <&timing0>; - st7703_timing: timing0 { + timing0: timing0 { clock-frequency = <66000000>; hactive = <720>; vactive = <1280>; @@ -369,10 +327,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + &dsi_in_vopl { status = "disabled"; }; +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &emmc { bus-width = <8>; cap-mmc-highspeed; @@ -1075,28 +1042,6 @@ status = "okay"; }; -&lvds { - status = "disabled"; - - ports { - port@1 { - reg = <1>; - - lvds_out_panel: endpoint { - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - -&lvds_in_vopl { - status = "disabled"; -}; - -&mipi_dphy { - status = "okay"; -}; - &nandc0 { status = "okay"; }; @@ -1179,14 +1124,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - -&route_lvds { - status = "disabled"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts index 59cbfd4e9b9c..c70563be39ec 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts @@ -95,48 +95,6 @@ default-brightness-level = <200>; }; - panel { - compatible = "samsung,lsl070nl01", "simple-panel"; - backlight = <&backlight>; - enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - enable-delay-ms = <20>; - prepare-delay-ms = <20>; - unprepare-delay-ms = <20>; - disable-delay-ms = <20>; - width-mm = <217>; - height-mm = <136>; - rockchip,data-mapping = "vesa"; - rockchip,data-width = <24>; - rockchip,output = "lvds"; - status = "disabled"; - - display-timings { - native-mode = <&timing0>; - - timing0: timing0 { - clock-frequency = <49500000>; - hactive = <1024>; - vactive = <600>; - hback-porch = <90>; - hfront-porch = <90>; - vback-porch = <10>; - vfront-porch = <10>; - hsync-len = <90>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; - }; - }; - }; - rk809-sound { compatible = "simple-audio-card"; simple-audio-card,name = "rockchip,rk809-codec"; @@ -338,9 +296,9 @@ ]; display-timings { - native-mode = <&st7703_timing>; + native-mode = <&timing0>; - st7703_timing: timing0 { + timing0: timing0 { clock-frequency = <66000000>; hactive = <720>; vactive = <1280>; @@ -359,10 +317,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + &dsi_in_vopl { status = "disabled"; }; +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &emmc { bus-width = <8>; cap-mmc-highspeed; @@ -1058,28 +1025,6 @@ status = "okay"; }; -&lvds { - status = "disabled"; - - ports { - port@1 { - reg = <1>; - - lvds_out_panel: endpoint { - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - -&lvds_in_vopl { - status = "disabled"; -}; - -&mipi_dphy { - status = "okay"; -}; - &nandc0 { status = "okay"; }; @@ -1165,14 +1110,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - -&route_lvds { - status = "disabled"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts index 2da41604e614..80a1982c675c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts @@ -97,48 +97,6 @@ default-brightness-level = <200>; }; - panel { - compatible = "samsung,lsl070nl01", "simple-panel"; - backlight = <&backlight>; - enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - enable-delay-ms = <20>; - prepare-delay-ms = <20>; - unprepare-delay-ms = <20>; - disable-delay-ms = <20>; - width-mm = <217>; - height-mm = <136>; - rockchip,data-mapping = "vesa"; - rockchip,data-width = <24>; - rockchip,output = "lvds"; - status = "disabled"; - - display-timings { - native-mode = <&timing0>; - - timing0: timing0 { - clock-frequency = <49500000>; - hactive = <1024>; - vactive = <600>; - hback-porch = <90>; - hfront-porch = <90>; - vback-porch = <10>; - vfront-porch = <10>; - hsync-len = <90>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; - }; - }; - }; - rk817-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -320,9 +278,9 @@ ]; display-timings { - native-mode = <&st7703_timing>; + native-mode = <&timing0>; - st7703_timing: timing0 { + timing0: timing0 { clock-frequency = <66000000>; hactive = <720>; vactive = <1280>; @@ -341,10 +299,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + &dsi_in_vopl { status = "disabled"; }; +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &dfi { status = "okay"; }; @@ -796,28 +763,6 @@ status = "okay"; }; -&lvds { - status = "disabled"; - - ports { - port@1 { - reg = <1>; - - lvds_out_panel: endpoint { - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - -&lvds_in_vopl { - status = "disabled"; -}; - -&mipi_dphy { - status = "okay"; -}; - &mipi_dphy_rx0 { status = "okay"; @@ -888,14 +833,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - -&route_lvds { - status = "disabled"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts index fe9511f832d5..58bbfdafb489 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts @@ -35,8 +35,3 @@ &rk_isp { status = "okay"; }; - -&mipi_dphy { - status = "okay"; -}; - diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dtsi index c053ae92ec41..d5252583f7a7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dtsi @@ -91,48 +91,6 @@ default-brightness-level = <200>; }; - panel { - compatible = "samsung,lsl070nl01", "simple-panel"; - backlight = <&backlight>; - enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - enable-delay-ms = <20>; - prepare-delay-ms = <20>; - unprepare-delay-ms = <20>; - disable-delay-ms = <20>; - width-mm = <217>; - height-mm = <136>; - rockchip,data-mapping = "vesa"; - rockchip,data-width = <24>; - rockchip,output = "lvds"; - status = "disabled"; - - display-timings { - native-mode = <&timing0>; - - timing0: timing0 { - clock-frequency = <49500000>; - hactive = <1024>; - vactive = <600>; - hback-porch = <90>; - hfront-porch = <90>; - vback-porch = <10>; - vfront-porch = <10>; - hsync-len = <90>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; - }; - }; - }; - rk817-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -305,9 +263,9 @@ ]; display-timings { - native-mode = <&st7703_timing>; + native-mode = <&timing0>; - st7703_timing: timing0 { + timing0: timing0 { clock-frequency = <66000000>; hactive = <720>; vactive = <1280>; @@ -326,10 +284,19 @@ }; }; +&dsi_in_vopb { + status = "okay"; +}; + &dsi_in_vopl { status = "disabled"; }; +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + &dfi { status = "okay"; }; @@ -730,24 +697,6 @@ status = "okay"; }; -&lvds { - status = "disabled"; - - ports { - port@1 { - reg = <1>; - - lvds_out_panel: endpoint { - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - -&lvds_in_vopl { - status = "disabled"; -}; - &nandc0 { status = "okay"; }; @@ -808,14 +757,6 @@ rockchip,sleep-debug-en = <1>; }; -&route_dsi { - status = "okay"; -}; - -&route_lvds { - status = "disabled"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8_soc>; |