ARM64: dts: rockchip: Fixup revisions for kevin

Turns out that we got mixed up.  Old stuff should just be rev 0.  New
stuff should be rev 1+.  Fix all that.

BUG=None
TEST=Boot rev 0.

Change-Id: I41b38893f1e4224df4e3646cd268179307b3476b
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chrome-internal-review.googlesource.com/256507
Commit-Ready: Doug Anderson <dianders@google.com>
Tested-by: Doug Anderson <dianders@google.com>
Reviewed-by: Brian Norris <briannorris@google.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

3 files changed, 67 insertions, 66 deletions

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 70a32af2b25c..6563eaa2029f 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -6,8 +6,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb1-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb1-cros.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-fpga.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-gru.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r1.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r2.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r2.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r0.dts
index 1aff9c79a60f..ff6166b8ec1e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r0.dts
@@ -1,5 +1,5 @@
 /*
- * Google Gru-Kevin Rev 2+ board device tree source
+ * Google Gru-Kevin Rev 0 board device tree source
  *
  * Copyright 2016 Google, Inc
  *
@@ -46,24 +46,55 @@
 #include "rk3399-gru.dtsi"
 
 / {
-	model = "Google Kevin";
-	compatible = "google,kevin-rev15", "google,kevin-rev14",
-		     "google,kevin-rev13", "google,kevin-rev12",
-		     "google,kevin-rev11", "google,kevin-rev10",
-		     "google,kevin-rev9", "google,kevin-rev8",
-		     "google,kevin-rev7", "google,kevin-rev6",
-		     "google,kevin-rev5", "google,kevin-rev4",
-		     "google,kevin-rev3", "google,kevin-rev2",
+	model = "Google Kevin Rev 0";
+	compatible = "google,kevin-rev0",
 		     "google,kevin", "google,veyron", "rockchip,rk3399";
 };
 
-/* PINCTRL: always below everything else */
+&pp3000 {
+	gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+};
+
+&pp1800_audio {
+	gpio = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+};
+
+&pp1800_pcie {
+	gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+};
+
+&sdmmc {
+	cd-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
+};
+
+&cros_ec {
+	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&ec_ap_int_l {
+	rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
+};
+
+&pp1500_en {
+	rockchip,pins = <RK_GPIO1 11 RK_FUNC_GPIO &pcfg_pull_none>;
+};
+
+&pp1800_audio_en {
+	rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO
+			 &pcfg_pull_none>;
+};
+
+&pp3000_en {
+	rockchip,pins = <RK_GPIO1 12 RK_FUNC_GPIO
+			 &pcfg_pull_none>;
+};
+
+&wlan_module_pd_l {
+	rockchip,pins = <RK_GPIO0 8 RK_FUNC_GPIO
+			 &pcfg_pull_none>;
+};
 
-&pinctrl {
-	pen-eject {
-		pen_eject_l: pen-eject-l {
-			rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO
-				&pcfg_pull_up>;
-		};
-	};
+/* This is where we actually hook up CD; has external pull */
+&sdmmc_cd_gpio {
+	rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r1.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r1.dts
index 8e2f59d4cedb..cf8a4fb6dde2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r1.dts
@@ -46,55 +46,25 @@
 #include "rk3399-gru.dtsi"
 
 / {
-	model = "Google Kevin Rev 1";
-	compatible = "google,kevin-rev1", "google,kevin-rev0",
-		     "google,kevin", "google,veyron", "rockchip,rk3399";
+	model = "Google Kevin";
+	compatible = "google,kevin-rev15", "google,kevin-rev14",
+		     "google,kevin-rev13", "google,kevin-rev12",
+		     "google,kevin-rev11", "google,kevin-rev10",
+		     "google,kevin-rev9", "google,kevin-rev8",
+		     "google,kevin-rev7", "google,kevin-rev6",
+		     "google,kevin-rev5", "google,kevin-rev4",
+		     "google,kevin-rev3", "google,kevin-rev2",
+		     "google,kevin-rev1", "google,kevin",
+		     "google,veyron", "rockchip,rk3399";
 };
 
-&pp3000 {
-	gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
-};
-
-&pp1800_audio {
-	gpio = <&gpio0 1 GPIO_ACTIVE_HIGH>;
-};
-
-&pp1800_pcie {
-	gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-};
-
-&sdmmc {
-	cd-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
-};
-
-&cros_ec {
-	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-};
-
-&ec_ap_int_l {
-	rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
-};
-
-&pp1500_en {
-	rockchip,pins = <RK_GPIO1 11 RK_FUNC_GPIO &pcfg_pull_none>;
-};
-
-&pp1800_audio_en {
-	rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO
-			 &pcfg_pull_none>;
-};
-
-&pp3000_en {
-	rockchip,pins = <RK_GPIO1 12 RK_FUNC_GPIO
-			 &pcfg_pull_none>;
-};
-
-&wlan_module_pd_l {
-	rockchip,pins = <RK_GPIO0 8 RK_FUNC_GPIO
-			 &pcfg_pull_none>;
-};
+/* PINCTRL: always below everything else */
 
-/* This is where we actually hook up CD; has external pull */
-&sdmmc_cd_gpio {
-	rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>;
+&pinctrl {
+	pen-eject {
+		pen_eject_l: pen-eject-l {
+			rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO
+				&pcfg_pull_up>;
+		};
+	};
 };