diff options
author | Finley Xiao <finley.xiao@rock-chips.com> | 2018-11-13 09:55:18 +0800 |
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committer | Tao Huang <huangtao@rock-chips.com> | 2018-11-13 14:07:15 +0800 |
commit | fddf48f50ab461cd3833207bea078feb70aa8301 (patch) | |
tree | cfd190769dfafd60a330afa8f5ad5ca10b9ea7bf /arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi | |
parent | e74aaf071164aae19a41c0a1426de9608f65640a (diff) |
arm64: dts: rockchip: rk3399pro-npu: Add opp table for cpu
Change-Id: Ic74db2d368b0b84ce8a2c8ed79d3084d89dc74da
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi index 79af595e6030..7cd3f50238a0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399pro-npu.dtsi @@ -31,6 +31,7 @@ reg = <0x0 0x0>; enable-method = "psci"; clocks = <&cru ARMCLK>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu1: cpu@1 { @@ -39,6 +40,39 @@ reg = <0x0 0x1>; enable-method = "psci"; clocks = <&cru ARMCLK>; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; + + cpu0_opp_table: cpu0-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; }; }; |