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authorRocky Hao <rocky.hao@rock-chips.com>2018-06-04 14:55:49 +0800
committerRocky Hao <rocky.hao@rock-chips.com>2018-06-04 17:17:38 +0800
commit90d074f764d249cda61af737e194c20323f367fa (patch)
tree61fd00c48e46d58dd0b478267d1d5911af10f3a4 /arch/arm64/boot/dts/rockchip/rk3399.dtsi
parentba67486670b3875b75635b6e745d51e44b822b39 (diff)
arm: dts: rockchip: thermal: update soc's sw/hw over temperature power off degree
to cope with Wide Temperature Range test, we maxamize soc's sw/hw over temperature power off degree. fow now, 115 degree Celsius is set to trigger sw powering off. if sw function does not work and temperature is continuing to grow up, and till 120 degree Celsius, hw powering off/reset is triggered. Change-Id: I751e9ea754f434bc20df39fdbdb40216a1582c39 Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 124a9114fb3d..d026527ee879 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -755,7 +755,7 @@
type = "passive";
};
soc_crit: soc-crit {
- temperature = <95000>; /* millicelsius */
+ temperature = <115000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
@@ -807,7 +807,7 @@
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
- rockchip,hw-tshut-temp = <95000>;
+ rockchip,hw-tshut-temp = <120000>;
status = "disabled";
};