diff options
author | Hu Kejun <william.hu@rock-chips.com> | 2018-04-24 11:54:51 +0800 |
---|---|---|
committer | Tao Huang <huangtao@rock-chips.com> | 2018-07-05 18:25:59 +0800 |
commit | 0a58f13cfaa856c9131fbe9aac70d77abcf38ef0 (patch) | |
tree | 229507c07beb902d6c151d111b1736a98ef65577 /arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts | |
parent | 9b1870765de7092192ad424879f52e6e8b30b091 (diff) |
arm64: dts: rockchip: rk3399-sapphire-excavator: isp0 and isp1 run at the same time
Change-Id: I320462c815699725625dbf6752b4ae482b367a4a
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts index 728b430079c0..98b6f352de77 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts @@ -193,6 +193,51 @@ pinctrl-0 = <&hdmiin_gpios>; status = "okay"; }; + + ov13850: ov13850@10 { + compatible = "ovti,ov13850"; + status = "disabled"; + reg = <0x10>; + clocks = <&cru SCLK_CIF_OUT>; + clock-names = "xvclk"; + /* avdd-supply = <>; */ + /* dvdd-supply = <>; */ + /* dovdd-supply = <>; */ + /* reset-gpios = <>; */ + reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; // conflict with csi-ctl-gpios + pwdn-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "rockchip,camera_default"; + pinctrl-0 = <&cif_clkout>; + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + //remote-endpoint = <&mipi_in_ucam1>; + data-lanes = <1 2>; + }; + }; + }; + + ov4689: ov4689@36 { + compatible = "ovti,ov4689"; + status = "disabled"; + reg = <0x36>; + clocks = <&cru SCLK_CIF_OUT>; + clock-names = "xvclk"; + /* avdd-supply = <>; */ + /* dvdd-supply = <>; */ + /* dovdd-supply = <>; */ + /* reset-gpios = <>; */ + pwdn-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; // conflict with backlight + pinctrl-names = "rockchip,camera_default"; + pinctrl-0 = <&cif_clkout>; + port { + ucam_out1: endpoint { + //remote-endpoint = <&mipi_in_ucam0>; + remote-endpoint = <&mipi_in_ucam1>; + data-lanes = <1 2>; + }; + }; + }; }; &i2c6 { @@ -229,6 +274,70 @@ status = "okay"; }; +&mipi_dphy_rx0 { + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + dphy_rx0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&isp0_mipi_in>; + }; + }; + }; +}; + +&mipi_dphy_tx1rx1 { + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam1: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out1>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + dphy_tx1rx1_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&isp1_mipi_in>; + }; + }; + }; +}; + &vopb { assigned-clocks = <&cru DCLK_VOP0_DIV>; assigned-clock-parents = <&cru PLL_CPLL>; @@ -247,6 +356,34 @@ status = "okay"; }; +&rkisp1_0 { + status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_mipi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy_rx0_out>; + }; + }; +}; + +&rkisp1_1 { + status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + isp1_mipi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy_tx1rx1_out>; + }; + }; +}; + &route_edp { status = "okay"; }; |