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authorFinley Xiao <finley.xiao@rock-chips.com>2017-07-12 19:23:36 +0800
committerHuang, Tao <huangtao@rock-chips.com>2017-07-13 10:34:07 +0800
commit1e186471add9d57449084ebaff4673700ffb3605 (patch)
tree786e3bfe46f706a42e9a99543996169e155782bb /arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
parent9de84324a2ec10ca7260a588698dbfc34131c730 (diff)
arm64: dts: rk3399: add leakage nvmem-cells properties for cpu
Change-Id: Id156f2a9a3871747d9379b49d09034238d204670 Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
index a7dc2c687c8f..dded263278f1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
@@ -47,6 +47,9 @@
compatible = "operating-points-v2";
opp-shared;
+ nvmem-cells = <&cpul_leakage>;
+ nvmem-cell-names = "cpu_leakage";
+
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
@@ -84,6 +87,9 @@
compatible = "operating-points-v2";
opp-shared;
+ nvmem-cells = <&cpub_leakage>;
+ nvmem-cell-names = "cpu_leakage";
+
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;