diff options
| author | Elaine Zhang <zhangqing@rock-chips.com> | 2016-05-27 16:30:54 +0800 |
|---|---|---|
| committer | Huang, Tao <huangtao@rock-chips.com> | 2016-05-30 17:28:18 +0800 |
| commit | 867841e0497f0a7121e47018516ecfcfeffdd86f (patch) | |
| tree | 63c9675f0858c135cf00f47e6e162de17b807107 /arch/arm64/boot/dts/rockchip/rk3399-android.dtsi | |
| parent | 8c8b9dc444a7e087dca084bf0f17c71e4a2d5644 (diff) | |
ARM64: dts: rk3399: pd: Add vopl\vopb\mipi\hdmi pd nodes
Change-Id: Iff66cf997896d34111706f884a32e82f44e21d6f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-android.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-android.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi index eb6c36df940a..4ca527e29b05 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi @@ -237,6 +237,7 @@ rockchip,grf = <&grf>; rockchip,pwr18 = <0>; rockchip,iommu-enabled = <1>; + power-domains = <&power RK3399_PD_VOPB>; power_ctr: power_ctr { /*rockchip,debug = <0>; lcd_en: lcd-en { @@ -280,6 +281,7 @@ rockchip,grf = <&grf>; rockchip,pwr18 = <0>; rockchip,iommu-enabled = <1>; + power-domains = <&power RK3399_PD_VOPL>; }; vopl_mmu_rk_fb: vopl-mmu { @@ -309,6 +311,7 @@ pinctrl-0 = <&hdmi_i2c_xfer &hdmi_cec>; pinctrl-1 = <&i2c3_gpio>; rockchip,grf = <&grf>; + power-domains = <&power RK3399_PD_HDCP>; }; mipi0_rk_fb: mipi-rk-fb@ff960000 { @@ -319,6 +322,7 @@ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, <&cru SCLK_MIPIDPHY_CFG>; clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg"; + power-domains = <&power RK3399_PD_VIO>; }; mipi1_rk_fb: mipi-rk-fb@ff968000 { @@ -329,6 +333,7 @@ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI1>, <&cru SCLK_MIPIDPHY_CFG>; clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg"; + power-domains = <&power RK3399_PD_VIO>; }; hdmi-sound { |