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authorJianqun Xu <jay.xu@rock-chips.com>2017-03-21 15:10:58 +0800
committerJianqun Xu <jay.xu@rock-chips.com>2017-03-21 16:28:23 +0800
commit1ab80996a7b103d518b3f54fe8aa70c493fd8450 (patch)
tree13f8815b8f41b87ca080c37f81f4d73e8f6dca4f /arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
parenta274596ac370dab19c3558a1208edff055b8571d (diff)
arm64: dts: rk3368-android: debug uart id change to uart3
Change earlycon and console to uart3. Change-Id: I7c6d7322e077b605b209dce4cf51afb26b9147dc Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3368-android.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368-android.dtsi10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
index 9b6e815c6c84..2dd5af22d98a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
@@ -42,18 +42,18 @@
/ {
chosen {
- bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
+ bootargs = "earlycon=uart8250,mmio32,0xff1b0000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
};
fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
- rockchip,serial-id = <2>;
+ rockchip,serial-id = <3>;
rockchip,signal-irq = <186>;
rockchip,wake-irq = <0>;
rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
pinctrl-names = "default";
- pinctrl-0 = <&uart2_xfer>;
+ pinctrl-0 = <&uart3_xfer>;
};
reserved-memory {
@@ -216,6 +216,10 @@
};
};
+&uart3 {
+ status = "okay";
+};
+
&vop {
status = "okay";
};