diff options
author | Xinhuang Li <buluess.li@rock-chips.com> | 2018-02-26 17:45:47 +0800 |
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committer | Tao Huang <huangtao@rock-chips.com> | 2018-02-28 09:32:25 +0800 |
commit | 1000befc2d7ed830d6e1e420f791d5bf9ced1aaf (patch) | |
tree | f080061f1193f2ffc47ba97ef6cec8ae01866323 /arch/arm64/boot/dts/rockchip/rk3328.dtsi | |
parent | 1400bae5b66f610d0bb7a877626822ffb8ba2386 (diff) |
arm64: dts: rockchip: rk3328: add aclk&hclk for h265e_mmu
Change-Id: I46bd3817219f80fddd097ec37e10a3a29209e21f
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3328.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 4be31d8f30f3..d67d578c01c6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -859,6 +859,8 @@ reg = <0x0 0xff330200 0 0x100>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "h265e_mmu"; + clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; + clock-names = "aclk", "hclk"; power-domains = <&power RK3328_PD_HEVC>; #iommu-cells = <0>; }; |